The following UltraScale+™ devices are in production:
Additional devices introduced in this release:
This release includes updates to these other popular IP cores:
The release also includes the following new LogiCORE IP:
| New Cores | Additional License Required | Product Guide (PDF) | AXI | 7 Series | Zynq 7000 | UltraScale | UltraScale+ | ||||||||
| Audio, Video & Image Processing | |||||||||||||||
| Audio I2S* (v1.0) |
PG308 |
AXI4 AXI4-Lite AXI4-Stream |
✓ | ✓ | ✓ | ✓ | |||||||||
| Communications | |||||||||||||||
| IEEE 802.3 Clause 74 FEC (v1.0) | ✓ | PG303 |
✓ | ✓ | |||||||||||
| ETRNIC (v1.0) |
✓ | PG294 | AXI4 AXI4-Lite AXI4-Stream |
✓ | ✓ | ||||||||||
| Polar Encoder/Decoder (v1.0) | ✓ | PG280 | AXI4-Lite AXI4-Stream |
✓ | ✓ | ✓ | |||||||||
| DSP & Math | |||||||||||||||
| Soft-Decision FEC Integrated Block (SD-FEC)* (v1.0) | PG256 |
AXI4-Lite AXI4-Stream |
ZynqUS+ RFSoC |
||||||||||||
| Embedded | |||||||||||||||
| AXI Sideband Formatter Utility* (v1.0) | PG307 |
AXI4 AXI4-Lite |
✓ | ✓ | ✓ | ||||||||||
| QDMA Subsystem for PCI Express* (v1.0) |
PG302 | AXI4-Lite AXI4-Stream |
✓ | ||||||||||||
| Interface and Interconnect |
|||||||||||||||
| Zynq UltraScale+ RFSoC RF Data Converter* (v2.0) | PG269 |
AXI4-Lite AXI4-Stream |
Zynq US+ RFSoC |
||||||||||||
| Memories | |||||||||||||||
| HBM IP* (v1.0) | PG276 | AXI4 |
Virtex US+ |
||||||||||||
| RAMA IP* (v1.0) |
PG310 | AXI4 | Virtex US+ | ||||||||||||
| Utility | |||||||||||||||
| Partial Reconfiguration AXI Shutdown Manager IP* (v1.0) | PG305 | AXI4-Lite | ✓ | ✓ | ✓ | ||||||||||
| Partial Reconfiguration Bitstream Monitor IP* (v1.0) | PG304 | AXI4-Lite | ✓ | ✓ | ✓ | ||||||||||
| Verification IP | |||||||||||||||
| Clock Verification IP* (v1.0) | PG291 | ✓ | ✓ | ✓ | ✓ | ||||||||||
| Reset Verification IP* (v1.0) | PG298 | ✓ | ✓ | ✓ | ✓ | ||||||||||
| New Core Versions | Additional License Required | Product Guide (PDF) | AXI | 7 Series | Zynq 7000 | UltraScale | UltraScale+ | |||||||
| Audio, Video & Image Processing | ||||||||||||||
| LogiCORE, DisplayPort RX/TX Subsystem (v2.1) | ✓ | PG199 (TX) PG233 (RX) |
AXI4-Lite AXI4-Stream |
✓ | ✓ | ✓ | ✓ | |||||||
| LogiCORE, DisplayPort 1.4 RX/TX Subsystem (v1.0) | ✓ | PG299 (TX) PG300 (RX) |
AXI4-Lite AXI4-Stream |
✓ | ✓ | |||||||||
| HDMI 1,4/2,0 Subsystem (v3.1) | ✓ | PG235 (TX) PG236 (RX) |
AXI4-Lite AXI4-Stream |
✓ | ✓ | ✓ | ✓ | |||||||
| MIPI CSI2 RX Controller Subsystem (v3.0) | ✓ |
|
AXI4-Lite AXI4-Stream |
✓ | ✓ | ✓ | ✓ | |||||||
| MIPI CSI2 TX Controller Subsystem (v2.0) | ✓ | PG260 |
AXI4-Lite AXI4-Stream |
✓ | ✓ | ✓ | ✓ | |||||||
| MIPI D-PHY (v4.1) | PG202 | AXI4-Lite |
✓ | ✓ | ✓ | ✓ | ||||||||
| Sensor Demosaic* (v1.0) | PG286 | AXI4-Lite AXI4-Stream |
✓ | ✓ | ✓ | ✓ | ||||||||
| SPDIF (v2.0) | ✓ | PG045 | AXI4-Lite AXI4-Stream |
✓ | ✓ | ✓ | ✓ | |||||||
| UHD Serieal Digital Interface (UHD-SDI) |
||||||||||||||
UHD-SDI Audio* (v1.0) |
PG309 | AXI4-Lite AXI4-Stream |
✓ | |||||||||||
| PG289 | AXI4-Lite AXI4-Stream |
✓ | ||||||||||||
SMPTE UHD-SDI Receiver Subsystem* (v2.0) |
PG290 | AXI4-Lite AXI4-Stream |
✓ | |||||||||||
| H.264/H.265 Video Codec Unit IP* (v1.1) |
PG252 |
AXI4-Lite |
Zynq US+ | |||||||||||
| Video Frame Buffer Read/Wright* (v2.0) | PG278 | AXI4-Lite AXI4-Stream |
✓ | ✓ | ✓ | ✓ | ||||||||
| Video Mixer (v3.0) | ✓ | PG243 | AXI4 AXI4-Lite AXI4-Stream |
✓ | ✓ | ✓ | ✓ | |||||||
| Video Processing Subsystem (v2.0) |
✓ | PG231 | AXI4 AXI4-Lite AXI4-Stream |
✓ | ✓ | ✓ | ✓ | |||||||
| Video PHY Controller (v2.2) (DisplayPort) |
PG230 | AXI4-Lite AXI4-Stream |
✓ | ✓ | ✓ | |||||||||
| Communications | ||||||||||||||
| Aurora | Additional License Required | Product Guide (PDF) | AXI | 7 Series | Zynq 7000 | UltraScale | UltraScale+ | |||||||
| Aurora 8B/10B * (v11.1) | PG046 | AXI4-Stream | ✓ | ✓ | ✓ | ✓ | ||||||||
| Aurora 64B/66B * (v11.2) | PG074
|
AXI4-Stream | Kiintex 7 Virtex 7 |
✓ | ✓ | ✓ | ||||||||
| Ethernet | ||||||||||||||
| 1G/10G/25G Switching Ethernet Subsystem (v2.0) | ✓ | PG292 | AXI4-Stream | ✓ | ||||||||||
| 10G/25G Ethernet Subsystem (25GEMAC / 25GBASE-KR) (v2.4) |
✓ | PG210 | AXI4 XGMII XXVGMII |
✓ | ✓ | |||||||||
| 40G/50G Ethernet Subsystem (50GEMAC / 50GBASE-KR2 / LAUI ) (v2.1) |
✓ | PG211 | AXI4-Stream |
✓ | ✓ | |||||||||
| 100G IEEE 802.3bj Reed-Solomon Forward Error Correction (v2.0) | ✓ | PB028 | AXI4-Lite | Virtex UltraScale | ✓ | |||||||||
| Tri-Mode Ethernet Media Access Controller (TEMAC) (v9.0) | ✓ | PG051 | AXI4-Lite AXI4-Stream |
✓ | ✓ | ✓ | ✓ | |||||||
| UltraScale Integrated 100G Ethernet Subsystem (CMAC) (v2.3) | ✓ | PG165 | ✓ | |||||||||||
| UltraScale+ Integrated 100G Ethernet Subsystem (CMAC-USPLUS) (v2.2) | ✓ | PG203 | ✓ | |||||||||||
| Interlaken | ||||||||||||||
| UltraScale Integrated Interlaken* (v2.4) | PG169 | ✓ | ✓ | |||||||||||
| Wireless | ||||||||||||||
| Peak Cancellation Crest Factor Reduction (PC-CFR) (v6.1) |
✓ | PB008 | AXI4-Stram AXI4-Lite |
✓ | ✓ | ✓ | ✓ | |||||||
| DSP & Math | ||||||||||||||
| Additional License Required | Product Guide (PDF) | AXI | 7 Series | Zynq 7000 | UltraScale | UltraScale+ | ||||||||
| LDPC Encoder/Decoder (v2.0) | ✓ | PB052 | AXI4-Lite AXI4-Stream |
✓ | ✓ | ✓ | ||||||||
| Embedded | ||||||||||||||
| Additional License Required | Product Guide (PDF) | AXI | 7 Series | Zynq 7000 | UltraScale | UltraScale+ | ||||||||
| AXI Central DMA Controller* (v4.1) | PG034 | AXI4 AXI4-Lite |
✓ | ✓ | ✓ | ✓ | ||||||||
| AXI DMA Controller* (v7.1) | PG021 | AXI4 AXI4-Lite AXI4-Stream |
✓ | ✓ | ✓ | ✓ | ||||||||
| AXI Chip2Chip* (v5.0) | PG067 | AXI4 AXI4-Lite |
✓ | ✓ | ✓ | ✓ | ||||||||
| AXI Interrupt Controller* (v4.1) | PG099 | AXI4-Lite | ✓ | ✓ | ✓ | ✓ | ||||||||
| AXI Stream Protocol Checker* (v2.0) |
PG145 |
AXI4 AXI4-Lite |
✓ | ✓ | ✓ | |||||||||
| AXI Traffic Generator* (v3.0) | PG125 | AXI4 AXI4-Stream AXI4-Lite |
✓ | ✓ | ✓ | ✓ | ||||||||
| Fast Fourier Transform* (v9.1) | PG109 | AXI4-Stream | ✓ | ✓ | ✓ | ✓ | ||||||||
| Mailbox* (v2.1) | PG114 | AXI4-Lite AXI4-Stream |
✓ | ✓ | ✓ | ✓ | ||||||||
| MicroBlaze Debug Module (MDM)* (v3.2) | PG115 |
AXI4 AXI4-Lite |
✓ | ✓ | ✓ | ✓ | ||||||||
| Ultrascale FPGAs Transceivers Wizard* (v1.7) | PG182 |
✓ | ✓ | |||||||||||
| Virtual Input/Output (VIO)* (v3.0) |
PG159 | ✓ | ✓ | ✓ | ✓ | |||||||||
| Interface and Interconnect | ||||||||||||||
| Additional License Required | Product Guide (PDF) | AXI | 7 Series | Zynq 7000 | UltraScale | UltraScale+ | ||||||||
| AXI Infrastructure |
||||||||||||||
| AXI Protocol Checker* (v2.0) | PG101 | AXI4 AXI4-Lite |
✓ | ✓ | ✓ | |||||||||
| AXI Quad SPI* (v3.2) | PG153 | AXI4 AXI4-Lite |
✓ | ✓ | ✓ | ✓ | ||||||||
| AXI4-Stream Infrastructure IP Suite* (v2.2) | PG085 |
AXI4-Lite AXI4-Stream |
✓ | ✓ | ||||||||||
| AXI Stream Verification IP (VIP)* (v1.1) | PG277 | AXI4-Stream | ✓ | ✓ | ✓ | ✓ | ||||||||
| AXI Verification IP (VIP)* (v1.1) | PG267 | AXI4 AXI4-Lite |
✓ | ✓ | ✓ | ✓ | ||||||||
| PCI Express® | ||||||||||||||
| AXI Memory Mapped to PCI Express (PCIe) Gen2* (v2.8) | PG055 | AXI4 | ✓ | ✓ | ||||||||||
| AXI Bridge PCI Express (PCIe) Gen3 Subsystem* (v3.0) | PG194 (v3.0) | AXI4 | ✓ Virtex 7 XT |
✓ | ✓ | |||||||||
| DMA for PCI Express (PCIe) Subsystem* (v4.1) |
PG195 | AXI4 AXI4-Lite AXI4-Stream |
✓ XT |
✓ | ✓ | |||||||||
| UltraScale+ Devices Integrated Block for PCI Express* (v1.3) | PG213 | AXI4-Stream | ✓ | |||||||||||
| UltraScale FPGAs Gen3 Integrated Block for PCI Express (PCIe) * (v4.4) | PG156 | AXI4-Stream | ✓ | |||||||||||
| 7 Series Integrated Block for PCI Express (PCIe) Gen2* (v3.3) | PG054 | AXI4-Stream | ✓ | ✓ | ||||||||||
| Serial Communications | ||||||||||||||
| Clocking Wizard * (v6.0) | PG065 | AXI4-Lite | ✓ | ✓ | ✓ | ✓ | ||||||||
| High Speed SelectIO Wizard* (v3.3) | PG188 | ✓ | ✓ | |||||||||||
| Ultrascale FPGAs Transceivers Wizard* (v1.7) | PG182 | ✓ | ✓ | |||||||||||
| Wireless | ||||||||||||||
| CPRI (v8.9) | ✓ | PB012 |
AXI4-Lite |
✓ | ✓ | ✓ | ✓ | |||||||
| JESD204C (v3.0) | ✓ | PG242 | AXI4-Lite AXI4-Stream |
✓ | ✓ | |||||||||
| Memory and Controllers | ||||||||||||||
| Additional License Required | Product Guide (PDF) | AXI | 7 Series | Zynq 7000 | UltraScale | UltraScale+ | ||||||||
| AXI AMM Bridge* (v1.0) | PG258 |
AXI4 AXI4-Lite Avalon |
✓ | ✓ | ||||||||||
| AMM Master Bridge* (v1.0) | PG287 | AXI4 | ✓ | ✓ | ✓ | ✓ | ||||||||
| Memory Interface* UltraScale/UltraScale+ v1.4 7 Series v3.0 |
✓ | ✓ | ✓ | ✓ | ||||||||||
| Utility IP | ||||||||||||||
| Additional License Required | Product Guide (PDF) | AXI | 7 Series | Zynq 7000 | UltraScale | UltraScale+ | ||||||||
| Partial Reconfiguration* (v1.3) | PG193 | AXI4-Lite AXI4-Stream |
✓ | ✓ | ✓ | |||||||||
| Soft Error Mitigation (SEM)* (UltraScale v3.1) |
PG187 | ✓ | ✓ | |||||||||||
| Soft Error Mitigation Controller (SEM)* (7 Series v4.1) |
PG036 | ✓ | ✓ | |||||||||||
*Included at no additional charge with Vivado
**Included at no additional charge with EDK