Public access support for the Zynq™-7000, device families has been added to a selection of cores in this release.
For a comprehensive listing of IP cores supporting these new device families, click the "IP in this Release" tab on this page.
This release includes updates to these other popular IP cores:
The release also includes the following new LogiCORE IP:
New Cores | Additional License Required | Datasheet (PDF) | AXI4 | Vivado | Spartan-6 | Virtex-5 | Virtex-6 | Virtex-7 | Virtex-7-HT | Kintex-7 | Artix-7 | Zynq-7000 |
Test Pattern Generator* (v4.00a) | ✓ | PG0103 | AXI4-Stream AXI4-Lite |
✓ | ✓ | ✓ | ✓ | ✓ | ✓ | ✓ | ||
SPDIF Controller(v1.2) | ✓ | PG045 | AXI4-Stream AXI4-Lite |
✓ | ✓ | ✓ | ✓ | ✓ | ✓ | ✓ | ||
AXI Exerciser* (v4.00a) | PG094 | AXI4 | ✓ | ✓ | ✓ | ✓ | ✓ | |||||
AXI Thin Film Transister (TFT) Controller* (v1.00a) | PG095 | AXI4 AXI4-Lite |
✓ | ✓ | ✓ | ✓ | ✓ | |||||
AXI Protocol Checker* (v1.0) | PG101 | AXI4 AXI4-Lite AXI3 |
✓ | ✓ | ✓ | ✓ | ||||||
New Cores Versions | Additional License Required | Datasheet (PDF) | AXI4 | Vivado | Spartan-6 | Virtex-5 | Virtex-6 | Virtex-7 | Virtex-7-HT | Kintex-7 | Artix-7 | Zynq-7000 |
Image Characterization(v3.00a) | ✓ | PG015(AXI) | AXI4-Stream AXI4-Lite |
✓ | ✓ | ✓ | ✓ | ✓ | ✓ | ✓ | ✓ | |
Image Edge Enhancement(v6.00a) | ✓ | PG003(AXI) | AXI4-Stream AXI4-Lite |
✓ | ✓ | ✓ | ✓ | ✓ | ✓ | ✓ | ✓ | |
Motion Adaptive Noise Reduction (v5.01a) | ✓ | PG006(AXI) | AXI4-Stream AXI4-Lite |
✓ | ✓ | ✓ | ✓ | ✓ | ✓ | ✓ | ✓ | |
Object Segmentation(v3.00a) | ✓ | PG018(AXI) | AXI4-Stream AXI4-Lite |
✓ | ✓ | ✓ | ✓ | ✓ | ✓ | ✓ | ✓ | |
On-Screen Display(v5.01a) | ✓ | PG010 | AXI4-Stream AXI4-Lite |
✓ | ✓ | ✓ | ✓ | ✓ | ✓ | ✓ | ✓ | |
AXI Video DMA(AXI VDMA) */** (v5.04a) | PG020(AXI) | AXI4 AXI4-Stream AXI4-Lite |
✓ | ✓ | ✓ | ✓ | ✓ | ✓ | ✓ | ✓ | ||
Automotive & Industrial | ||||||||||||
New Cores Versions | Additional License Required | Datasheet (PDF) | AXI4 | Vivado | Spartan-6 | Virtex-5 | Virtex-6 | Virtex-7 | Virtex-7-HT | Kintex-7 | Artix-7 | Zynq-7000 |
CAN(v4.2) | ✓ | PG096(AXI) | AXI4-Lite | ✓ | ✓ | ✓ | ✓ | ✓ | ✓ | ✓ | ✓ | |
New Cores Versions | Additional License Required | Datasheet (PDF) | AXI4 | Vivado | Spartan-6 | Virtex-5 | Virtex-6 | Virtex-7 | Virtex-7-HT | Kintex-7 | Artix-7 | Zynq-7000 |
Aurora | ||||||||||||
Aurora 8B/10B* (v8.3) | PG046 | AXI4-Stream | ✓ | ✓ | ✓ | ✓ | ✓ | ✓ | ✓ | |||
Aurora 64B/66B* (v7.3) | PG074 | AXI4-Stream | ✓ | ✓ | ✓ | ✓ | ✓ | |||||
Error Correction | ||||||||||||
Soft Error Mitigation (SEM) Core* (v3.4) | PG036 | ✓ | ✓ | ✓ | ✓ | ✓ | ✓ | ✓ | ||||
Ethernet | ||||||||||||
10 Gigabit Ethernet PCS/PMA with FEC/Auto-Negotiation for Backplanes(10GBASE-KR) (v2.6) | ✓ | PG068 | ✓ | ✓ | ✓ | |||||||
10 Gigabit Ethernet PCS/PMA(10GBASE-R) * (v2.6) | PG068 | ✓ | ✓ | ✓ | ✓ | |||||||
10 Gigabit Ethernet Medial Access Controller(10GEMAC) (v11.5) | ✓ | PG072 | AXI4-Stream AXI4-Lite |
✓ | ✓ | ✓ | ✓ | ✓ | ✓ | ✓ | ✓ | |
Ethernet 1000BASE-X PCS/PMA or SGMII(1000BASE-X) * (v11.5) | PG047 | ✓ | ✓ | ✓ | ✓ | ✓ | ✓ | ✓ | ✓ | |||
SMPTE2022-5/6 Video Over IP (v2.1) | ✓ | PG023 | AXI4 AXI4-Stream AXI4-Lite |
✓ | ✓ | ✓ | ✓ | ✓ | ||||
Tri-Mode Ethernet Media Access Controller(TEMAC) (v5.5) | ✓ | PG051 | AXI4-Stream AXI4-Lite |
✓ | ✓ | ✓ | ✓ | ✓ | ✓ | ✓ | ✓ | |
Wireless | ||||||||||||
CPRI(PC-CFR) (v6.1) | ✓ | PB012 | AXI4-Lite | ✓ | ✓ | ✓ | ✓ | ✓ | ✓ | ✓ | ✓ | |
JESD204(v3.1) | ✓ | PB011 | AXI4-Stream AXI4-Lite |
✓ | ✓ | ✓ | ✓ | ✓ | ✓ | |||
Peak Cancellation Crest Factor Reduction(PC-CFR) (v3.1) | ✓ | PB008 | AXI4-Stream AXI4-Lite |
✓ | ✓ | ✓ | ✓ | ✓ | ✓ | ✓ | ||
Embedded Processing | ||||||||||||
New Cores Versions | Additional License Required | Datasheet (PDF) | AXI4 | Vivado | Spartan-6 | Virtex-5 | Virtex-6 | Virtex-7 | Virtex-7-HT | Kintex-7 | Artix-7 | Zynq-7000 |
AXI External Memory Controller(AXI EMC)** (v1.03b) | PG100 | AXI4 AXI4-Lite |
✓ | ✓ | ✓ | ✓ | ✓ | ✓ | ✓ | |||
AXI Interrupt Controller(AXI INTC)* (v2.00a) | PG099 | AXI4-Lite | ✓ | ✓ | ✓ | ✓ | ✓ | ✓ | ✓ | |||
AXI PCI Express (PCIe)** (v1.06a) | PG055 | AXI4 | ✓ | ✓ | ✓ | ✓ | ✓ | ✓ | ✓ | |||
AXI Performance Monitor** (v3.00a) | PG037 | AXI4 AXI4-Stream AXI4-Lite |
✓ | ✓ | ✓ | ✓ | ✓ | ✓ | ✓ | |||
AXI Quad SPI** (v2.00a) | DS843 | AXI4 AXI4-Lite |
✓ | ✓ | ✓ | ✓ | ✓ | ✓ | ✓ | |||
AXI Streaming FIFO** (v3.00b) | PG080 | AXI4 AXI4-Stream AXI4-Lite |
✓ | ✓ | ✓ | ✓ | ✓ | ✓ | ✓ | |||
AXI System Cache* (v1.01c) | PG031 | AXI4 AXI4-Lite |
✓ | ✓ | ✓ | ✓ | ✓ | ✓ | ✓ | |||
Fixed Interval Timer*/** (v1.01c) | PG037 | ✓ | ✓ | ✓ | ✓ | ✓ | ✓ | ✓ | ✓ | |||
FSL_V20 * (v2.11f) | DS449 | ✓ | ✓ | ✓ | ||||||||
I/O Module* (v1.02b) | PG052 | ✓ | ✓ | ✓ | ✓ | ✓ | ✓ | ✓ | ✓ | |||
LMB BRAM Interface Controller* (v3.10c) | PG061 | ✓ | ✓ | ✓ | ✓ | ✓ | ✓ | ✓ | ✓ | |||
Mailbox* (v1.01b) | PG088 | AXI4-Stream AXI4-Lite |
✓ | ✓ | ✓ | ✓ | ✓ | ✓ | ✓ | ✓ | ||
FPGA Features & Debug | ||||||||||||
New Cores Versions | Additional License Required | Datasheet (PDF) | AXI4 | Vivado | Spartan-6 | Virtex-5 | Virtex-6 | Virtex-7 | Virtex-7-HT | Kintex-7 | Artix-7 | Zynq-7000 |
7 Series FPGAs Transceiver Wizard* (v2.4) | UG769 | ✓ | ✓ | ✓ | ✓ | ✓ | ||||||
Clocking Wizard* (v4.4) | PG065 | ✓ | ✓ | ✓ | ✓ | ✓ | ✓ | ✓ | ✓ | |||
XADC Wizard* (v2.4) | PG091 | AXI4-Lite | ✓ | ✓ | ✓ | ✓ | ✓ | |||||
Interconnect Infrastructure | ||||||||||||
New Cores Versions | Additional License Required | Datasheet (PDF) | AXI4 | Vivado | Spartan-6 | Virtex-5 | Virtex-6 | Virtex-7 | Virtex-7-HT | Kintex-7 | Artix-7 | Zynq-7000 |
AXI Central DMA Controller** (v3.04a) | PG034(AXI) | AXI4 AXI4-Lite |
✓ | ✓ | ✓ | ✓ | ✓ | ✓ | ✓ | |||
AXI Chip2Chip(v3.00a) | PG067(AXI) | AXI4 AXI4-Lite |
✓ | ✓ | ✓ | ✓ | ||||||
AXI DMA Controller** (v6.03a) | PG021(AXI) | AXI4 AXI4-Stream AXI4-Lite |
✓ | ✓ | ✓ | ✓ | ✓ | ✓ | ✓ | ✓ | ||
AXI Datamover* (v4.02a) | PG022(AXI) | AXI4 AXI4-Stream |
✓ | ✓ | ✓ | ✓ | ✓ | ✓ | ✓ | |||
AXI Stream Interconnect* (v1.1) | PG035 | AXI4-Stream | ✓ | ✓ | ✓ | ✓ | ✓ | ✓ | ✓ | |||
Math Functions | ||||||||||||
New Cores Versions | Additional License Required | Datasheet (PDF) | AXI4 | Vivado | Spartan-6 | Virtex-5 | Virtex-6 | Virtex-7 | Virtex-7-HT | Kintex-7 | Artix-7 | Zynq-7000 |
Floating Point Operator* (v6.2) | PG060 | AXI4 AXI4-Lite |
✓ | ✓ | ✓ | ✓ | ✓ | ✓ | ✓ | ✓ | ||
Memories & Storage Elements | ||||||||||||
New Cores Versions | Additional License Required | Datasheet (PDF) | AXI4 | Vivado | Spartan-6 | Virtex-5 | Virtex-6 | Virtex-7 | Virtex-7-HT | Kintex-7 | Artix-7 | Zynq-7000 |
Block Memory Generator* (v7.3) | PG058 | AXI4 AXI4-Lite |
✓ | ✓ | ✓ | ✓ | ✓ | ✓ | ✓ | ✓ | ||
Distributed Memory Generator* (v7.2) | PG057 | ✓ | ✓ | ✓ | ✓ | ✓ | ✓ | ✓ | ✓ | ✓ | ||
FIFO Generator* (v9.3) | PG057 | AXI4 AXI4-Stream AXI4-Lite |
✓ | ✓ | ✓ | ✓ | ✓ | ✓ | ✓ | ✓ | ✓ | |
Memory Interface Generator* (MIG) (v3.92 / 7 Series v1.8) | MIG | AXI4 | ✓ | ✓ | ✓ | ✓ | ✓ | ✓ | ✓ | ✓ | ✓ | |
Standard Bus Interfaces | ||||||||||||
New Cores Versions | Additional License Required | Datasheet (PDF) | AXI4 | Vivado | Spartan-6 | Virtex-5 | Virtex-6 | Virtex-7 | Virtex-7-HT | Kintex-7 | Artix-7 | Zynq-7000 |
PCI Express® | ||||||||||||
AXI PCI Express (PCIe)** (v1.06a) | PG055 | AXI4 | ✓ | ✓ | ✓ | ✓ | ✓ | ✓ | ✓ | |||
Virtex-7 FPGA Gen3 Integrated Block for PCI Express (PCIe)* (v1.4) | PG023 | AXI4-Stream | ✓ | ✓ | ||||||||
7 Series Integrated Block for PCI Express (PCIe)Gen 2* (v1.8) | PG054 | AXI4-Stream | ✓ | ✓ | ✓ | ✓ | ✓ | |||||
RapidIO | ||||||||||||
Serial RapidIO Gen2(v1.6) | ✓ | PG007 | AXI4-Stream AXI4-Lite |
✓ | ✓ | ✓ | ✓ | ✓ | ✓ | ✓ |
*Included at no additional charge with Vivado
**Included at no additional charge with EDK