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The MIPI D-PHY IP is designed for transmission and reception of video or pixel data for camera and display interfaces. MIPI D-PHY v3.0 LogiCORE IP Product Guide (PG202) 2017-03-30T16:25:45Z FrameMaker 2015.0.5 Acrobat Distiller 15.0 (Windows) Zynq,UltraScale,virtex, kintex,Embedded,Vivado,CSI-2,DSI,display serial,camera serial, AXI4-lite,ppi, UltraScale+ uuid:698c849a-8098-4777-b176-0ab60bc1ba9b uuid:96c45a93-1b13-42c0-9752-3e05e19a3c8a 2017-03-30T17:16:08+05:30 endstream endobj 3803 0 obj << /Author (Xilinx, Inc.) /CreationDate (D:20170330162545Z) /Creator (FrameMaker 2015.0.5) /Keywords (Zynq,UltraScale,virtex, kintex,Embedded,Vivado,CSI-2,DSI,display serial,camera serial, AXI4-lite,ppi,\ UltraScale+) /ModDate (D:20170330171608+05'30') /Producer (Xilinx, Inc. via ABCpdf) /Subject (The MIPI D-PHY IP is designed for transmission and reception of video or pixel data for camera and di\ splay interfaces.) /Title (MIPI D-PHY v3.0 LogiCORE IP Product Guide \(PG202\)) /XilinxDocID (PG202) >> endobj 3804 0 obj << /Dests 939 0 R /EmbeddedFiles 3799 0 R >> endobj 3805 0 obj << /Count 13 /First 3824 0 R /Last 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The MIPI D-PHY IP is designed for transmission and reception of video or pixel data for camera and display interfaces. MIPI D-PHY v3.1 LogiCORE IP Product Guide (PG202) Zynq,UltraScale,virtex, kintex,Embedded,Vivado,CSI-2,DSI,display serial,camera serial, AXI4-lite,ppi, UltraScale+ 2017-03-30T16:25:45Z FrameMaker 2015.0.5 2017-03-30T17:18:21+05:30 2017-03-30T17:18:21+05:30 Xilinx, Inc. via ABCpdf "Zynq,UltraScale,virtex, kintex,Embedded,Vivado,CSI-2,DSI,display serial,camera serial, AXI4-lite,ppi, UltraScale+" uuid:698c849a-8098-4777-b176-0ab60bc1ba9b uuid:fae4b03e-4ec0-445d-b708-ae1eb15e82d5 PG202 endstream endobj 3938 0 obj <> endobj xref 0 1 0000000000 65535 f 3802 1 0001616409 00000 n 3938 1 0001620742 00000 n trailer <<055EF54C0105FA4C907AD6D5ABFD2A66>]/Prev 191>> startxref 1621246 %%EOF