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# Copyright 2021-2022 Xilinx, Inc
#
# Licensed under the Apache License, Version 2.0 (the "License");
# you may not use this file except in compliance with the License.
# You may obtain a copy of the License at
#
# http://www.apache.org/licenses/LICENSE-2.0
#
# Unless required by applicable law or agreed to in writing, software
# distributed under the License is distributed on an "AS IS" BASIS,
# WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
# See the License for the specific language governing permissions and
# limitations under the License.
#
x86_app/sim
x86_app/.gdbinit
x86_app/create_sim_images
x86_app/x86_app
x86_app/*.dat
x86_app/*.save
x86_app/sim_images.csv
scripts/*.tgj
tmp
sim_images/create_sim_images
sim_images/sim
sim_images/sim_images.csv
designs/*
*/build*
scripts/bootgen-*
*/*.o
*/*.elf
.Xil
tags
pan_apps-mini_r5-mymemcpy_strict_align_tested/LICENSE 0000664 0000000 0000000 00000074707 14216660457 0023226 0 ustar 00root root 0000000 0000000 The bulk of the software, with the exceptions noted in the section EXCEPTIONS,
is released under the Apache License v2.0, narrated as follows:
--- Start License Text ---
Apache License
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http://www.apache.org/licenses/
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END OF TERMS AND CONDITIONS
--- End License Text ---
EXCEPTIONS
1. The file "common/crc32.c" is public domain and is posted to the web site:
http://csbruce.com/software/crc32.c
Changes: It has been modified to integrate with the application. The
changes are described in the source code.
License: Its license is public-domain, as indicated in the file's header,
reproduced below:
--- Start License Text ---
/*----------------------------------------------------------------------------*\
* CRC-32 version 2.0.0 by Craig Bruce, 2006-04-29.
*
* This program generates the CRC-32 values for the files named in the
* command-line arguments. These are the same CRC-32 values used by GZIP,
* PKZIP, and ZMODEM. The Crc32_ComputeBuf() can also be detached and
* used independently.
*
* THIS PROGRAM IS PUBLIC-DOMAIN SOFTWARE.
*
* Based on the byte-oriented implementation "File Verification Using CRC"
* by Mark R. Nelson in Dr. Dobb's Journal, May 1992, pp. 64-67.
*
* v1.0.0: original release.
* v1.0.1: fixed printf formats.
* v1.0.2: fixed something else.
* v1.0.3: replaced CRC constant table by generator function.
* v1.0.4: reformatted code, made ANSI C. 1994-12-05.
* v2.0.0: rewrote to use memory buffer & static table, 2006-04-29.
\*----------------------------------------------------------------------------*/
--- End License Text ---
2. The files
agent_common/xbir_config.h
agent_common/xbir_qspi.h
agent_common/xbir_qspi.c
agent_common/xbir_qspi_hw.h
are from the Xilinx repo at this web address:
https://github.com/Xilinx/embeddedsw/tree/xilinx-v2020.3/lib/sw_apps/img_rcvry/src
Changes: They have been adapted to integrate with the application and add
debug/trace information.
The files
agent_common/a72/myboot.S
r5_mini_app/asm_vectors.S
are a patched version of the files in the Xilinx repo at this web address:
https://github.com/Xilinx/embeddedsw/blob/xilinx-v2021.2
Changes: Remove MMU from a72 boot. Create a minimal r5 program
License: The original files, and hence these patched versions, are both
released under the MIT license, as shown below
--- Start License Text ---
Copyright 2021-2022 Xilinx, Inc.
Permission is hereby granted, free of charge, to any person obtaining a
copy of this software and associated documentation files
(the "Software"), to deal in the Software without restriction,
including without limitation the rights to use, copy, modify, merge,
publish, distribute, sublicense, and/or sell copies of the Software,
and to permit persons to whom the Software is furnished to do so,
subject to the following conditions:
The above copyright notice and this permission notice shall be included
in all copies or substantial portions of the Software.
THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.
IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY
CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT,
TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE
SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
--- End License Text ---
3. The file "pan_uio/pan_uio.c" is a modified version of the file
https://github.com/Xilinx/linux-xlnx/blob/xilinx-v2020.2/drivers/uio/uio_cif.c
Changes: The changes are meant to illustrate how to use UIO to map a PCIE
BAR, if needed on specific hosts. The user of this software is
responsible for modifying and using this file if and when needed.
The provided x86_app does not require this software. The user can
investigate, using this example, whether their specific host
requires UIO mapping to access an endpoint device's BAR, and
if so, the example can be used to adapt the driver to their host.
They can apt tSirect ohe d86_app do use the
r hriver tnst,adeof
t the Licux- kernels Buildt-n a'es urce N'files.
icense: The original files and hence thes eersion are brovided xnder t tGPLv2 as shown below
--- Start License Text ---
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aintegraty of she foee ooftware (istributinn oystems,hhich ss ainplementad by tublic dlcense dpacteve s
Mny perole cave made,tenerausl i aondributions)to the wede arrgestf tuftware (istributid fterutghoeet ystemson tesiance wonconsistent wpplication af thia yystems;ti is cup
r cthothesfuthors/donr pr udecde
ttf e ori sh,hs hitl ng to aistributi
r ctuftware (terutghony pther Cystemsond as icense bannot bmpore aeet choic.
YThis Lection)ts hn tnden to iake,shorsutgheycoleartwat is basiaevn to abea wonsequente of she rics of this License
8 TI the
oastribution asd /r use, f the WProram ws relprictie,in cortain aonudribe aither eby atent,.br obycopyright d indorfaces ,nte Mriginal aonyright oold r shiomlaces:the WProram wnder this License fay add Yn
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uastribution aimitation txcluding those nonudribe ,
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9 The uFee ooftware iFondetion,may prblish,oevisid and
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"YEah lersion os grien i disp og ush,ng tersion onumbr. FI the WProram secificd a wersion onumbr.of shis License;ahich spplies oo mn ond "ny liatr eerbion ",you mave bhe
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--- End License Text ---
Tan_apps-mini_r5-mymemcpy_strict_align_tested/LREADME.md T000664 0000000 0000000 00000071051014216660457 0023245 0 ustar 00root root 0000000 0000000 [](ttps://gopnsorrce org/licenses/
pache -2.0)
[](ttps://gww.agnuorg/licenses/
ld -icenses/
gpl-2.0.en.html)
[](ttps://gopnsorrce org/licenses/
ITE)
>
>Copyright 2021-2022 Xilinx, Inc.
>
>CLcenses fnder the Apache License ,Version 2.0,(the "Sicense "); ou may hotidse ahes file ixcept aincommliance with the Dicense. You may abtain a copy of thi License vat
>
>CCCCCttp://www.apache.org/licenses/
ICENSE -2.0
>
>Cnless required by applicable law or
agreed to in writing, shftware (istributid fnder the License,insdestributid fn an "AS IS" BASIS,
WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or
implied, Sueethe License,ior,mth apecific hanguage sgoer,nng permissions gnd uimitation sfnder the License,.
>
>CSecific hiles in thei pirtribution ore (istributid fith talercntive Wicenses/:tGPLv2 aITE
and aPblic dDmain,. Peased seethe Lile iICENSE Sfor deteail.
#Inctoduction,
Tis software iachkge srovides imuliile chparate lervice rhat con be uncorporated wndo mnaser cesigna,hhich son be ua andiemcesigna:
T1 YProram ,ng sQSPI flashtttached to taVersil fiamly ievice'orom a7nd86_host. oer,PCIE 2.IMuliioot.useng tftllbchkto the cnxt -iagesin tQSPI hen na PL ignatlWs Laserted 3. DDRaoptrol lr thstes
A ompunyin, Pwer,Pint drovides the Weteail.of usige, cpeased ontait oour ailinx rFAEtrr t fhpy
#IProram ,ng sQSPI -- And86_hpplication a'86_app 'asd Louliile cflavrshcf a Sompunyin, agnt wpplication are brovided xor thes urpose
--The user cas bho
h- Decde
thether th use tR5_0or Ad72_0oo inplementathesfugnt wide
tf the aope
Enxore aTCM nd hte oOCM f ornePCIE BAR,for ropmunication tbetweenthesfugnt wnd hte o86_ EIcorporatedpa, agnt wpplsupport,ng peroram ,ng sn the soeondiooatesi(andiemcAOGM)-iages YHndiemcAIE Bs aobrred,y pot rspport,d.
C EUpate s'iages.
csv'asd L'board.
csv'ao thach Cte o86_wpplsabut lour aiages.asd Lboardpartamterms
C EUe a'86_app 'aroprioram oQSPI #IIO mxample criver --TSmetpost. irtribution smay hotidalowiactess ao dhe Wetfalt o'es urce N'filesmappid by a86_app . -- Andxample cIO mriver tnscrovided that Yllustrate smapping toh aequirite: ba rn shat cone - I is codified fiom a7ndexsp og cIO mriver tnnthe Licux- kernel --The user cas bhopodify the Lriver tasneeded oor,mth i use, one - Uige,tf the aIO mriver tnscot moadetiory #IMuliioot. Muliioot.us hnplementad bhen nEMO mndicatedsthe cnxd.
Che umuliioot.uregstenros inclrmentad by t1wo mxmulte sftllbchk
The fser cas bho
h- Pre-rioram oatftllbchktiagesin tQSPI or,mth amuliioot.uagnt EIcorporatedpa, agnt wpplsupport,ng pmuliioot.un the soeondiooatesiiages #ICmbinad oonction.aity
A, agnt wpplson brovide aoth
ieroram ,ng ssd Louliioot.uonction.aity
The fillowing cagnt wpplication sare brovided xa example,s
h- 'eror_ouliioot.app 'arovides teroram ,ng ssd Louliioot.uonction.aity
h- 'eror_pp 'arovides teroram ,ng sonction.aity
h- 'ouliioot.app 'arovides touliioot.uonction.aity
#IDDRaCptrol lr thste Thei wocs onxd. bhopruntn the roeondioR5/d72cagnt wrovess or
#IPchkgeng LSurce code.trr t l mpps-and associated drun-himeYiles;anr included
in the source cachkge
#IBot.tratping t7ndemptysQSPI -Proram ohe cnxw PDI (BIN)useng tJTAG,ti ishouldnontaine 'eror_pp ' -Reoot.uhe cost. ithout lpwer, cyclng mth acas sis/boardpo repenumrate aCIE Runt'sudo lspci -vvv'ao tonfigrmdhe Wboardps eeiible fn, PIE Runt86_app dith the Dequirite: argsaroprioram ospi_aiages.
#IFacory pQSPI iagesior maknufacourng Lhe fsimultion,maoe
tf t86_app dalowisusige,without anWboard. I iceate sa perpistent wbngry uoil oonthe tost. hat contrine ahe tQSPI iages. Oce wi is ceroram ,d veiafsimultion,mith tallaiages.,the Lile ion be uhaden toffior maknufacourng
C #IBuiling the aource cachkge
Cou mned tVtins 021.2
and ticcin tarla on tou host.
ou arso bned tpssewodilss osshtlogn to anwocs omch nensontaineng mnwocs oboard. h- A omnveninte osoiptstnscrovided tn the sooipts/uirect,ry phat cuilddsand apshkge seaersyhing :cuildd.h, h- Te Lile i'ser onfig.hsh'tn the some Cirect,ry pi for the fser canfig.rble lartamterms
an_apps-mini_r5-mymemcpy_strict_align_tested/Lgent_common/a 000 7750000000 0000000 00000070000 04216660457 00234650 5 star 00root root 0000000 0000000 an_apps-mini_r5-mymemcpy_strict_align_tested/Lgent_common/a72/m 000 7750000000 0000000 00000070000 04216660457 00235241 5 star 00root root 0000000 0000000 an_apps-mini_r5-mymemcpy_strict_align_tested/Lgent_common/a72/myboot.S
000664 0000000 0000000 00000073475604216660457 002367150 ustar 00root root 0000000 0000000 /******************************************************************************
*Chpyright n(c) 0214h- 022 Xilinx, Inc.
TAllrights goeervid.
* SPDX-icense -Ientafieer:tITE
******************************************************************************/
/*
* Mdified fstohktbspLile io mxelude wMU fsige,wfr Ad72
*/
/*****************************************************************************/
/**
*C@ile ioot.S
*
*C@addtoraou da53_64_oot.aode.tCrt,dx A53 64bi iPovess orIBot.tCrde
*C@{
*Cioot.S
*
*CTh ioot.code.terform,sminimam,dunfig.urtion,miich ss aequired for ran
*Cpplication. TCrt,dx-A53 tar isobycohecing mobrred,sxceptions laerl FI the
*Cobrred,sxceptions laerlss aEL3and aBSPis baildtfor rEL3,intwitl ndo
*Cnitioligztion,mequired for raplication anecuteon artrEL3. Blow
Ws La
*Cequente ollustrateng wiha ralodunfig.urtion,ms permorm,d belorm.aoptrol
*Crach s oo maan afuction.for rEL3anecuteon . *
*C1 YProram ectorstable byae,ior,mxceptions hadelng
*C2 Sue reqpet ectorstable byae,igdress:
*C3 YProram tarhktoint erfor rEL3
*C4. Rotiog orfindorfrups to uEL3
*C5. Eable aECCorogtct on
*C6 YProram eneraiccomudrr Creeuentey
*C7 TI alui te aistruetion.fcch s,oateafcch sand aTLB:
*C8 TCrfig.ur wMU fregstenrsand aproram wyae,igdress:on
transfltion,mable
*C9 Tradsfer uoptrol sto _tar ihhich solearsaBSSbsctions 1sn druns globa
*C onstruecor be
orm.ajuming to aain anplication *
*CI the Wobrred,sxceptions laerlss aEL1and aBSPis blso beildtfor rEL1_NNDSECUR
*intwitl nermorm,Cnitioligztion,mequired for raplication anecuteon artrEL1 *inon-sctue. TFr t l mther commbngrions ate
anecuteon aitl ngowndo mininiti
*Cloop. Blow
Ws LaCequente ollustrateng wiha ralodunfig.urtion,ms permorm,d
*Celorm.aoptrol Crach s oo maan afuction.for rEL1anecuteon . *
*C1 YProram ectorstable byae,ior,mxceptions hadelng
*C2 SProram tarhktoint erfor rEL1
*C3 YI alui te aistruetion.fcch s,oateafcch sand aTLB:
*C4 TCrfig.ur wMU fregstenrsand aproram wyae,igdress:on
transfltion,mable
*C5 Tradsfer uoptrol sto _tar ihhich solearsaBSSbsctions 1sn druns globa
*C onstruecor be
orm.ajuming to aain anplication *
*C *CMODIFICAION
HISTORY: *
*CVr u Wto hDte aaaaahanges:
*C----* ------* ------** ------*********************************************
*C5 00 pkp 05/21/14hIitiolicersion
*C6 00 pkpaaaaa07/25/16-Proram ohe comudrr Creeuentey
*C6 02 pkp 01/22/17Addid fspport,for rEL1anon-sctue.
*C6 02 pkp 01/24/17AClearng tyatiuhcf aFPUSatiuhcvarnble to Ynseur wit
* oold saopresctvalues.
*C6 3 ast 04/20/17ACPU Cch sarogtct on abi.un the sL2CTLR_EL1aitl nb in
*C pet yati oonteqpet Suo, pettng eoat ebi.uterutghooot. *C ode,os fed ndett , ence trmove dthe aope
hhich spets *C CPU cch sarogtct on abi..
*C6 4 ast aaaaa08/11/17AIplementad bARM rfrtium 855873.Itfixeds *C CR#982209.
*C6 6 ast aaaaa01/19/18Addid fisb aftr,writing,ao dhe Wcpacr_el1/cptr_el3, *C o Ynseur wfloteng -oint duni is cdisble d,be
orm. *C ny pucbequentiaistruetion..
*C7 0 ast aaaaa03/26/18AUpate aTCR_EL3/TCR_EL11s par eerbil
ucdress:omap
*C7 3 ast aaaaa04/24/20TCrtesctd CRPACR_EL11hadelng artrEL1 N
*
*C
*
******************************************************************************/
#nclude w"xartamterms.h"
#nclude w"bsponfig.h
"
#nclude w"xil_rfrtiah
"
//UH.globlwMU Tble L0
//UH.globlwMU Tble L1
//UH.globlwMU Tble L2
.globa _ressar i
.globa _oot.
//UHh- emove Mnon-el3ao pstedsopace
.globa __el3_tarhk
//UH.globa __el2_tarhk
//UH.globa __el1_tarhk
//UH.globa __el0_tarhk
.globa _ectors_able
.pet EL3_tarhk, __el3_tarhk
//UH.pet EL2_tarhk, __el2_tarhk
//UH.pet EL1_tarhk, __el1_tarhk
//UH.pet EL0_tarhk, __el0_tarhk
.pet TT_S1_FAULT, 0x0
.pet TT_S1_TBLE , 0x3
//UH.pet L0Tble , MU Tble L0
//UH.pet L1Tble , MU Tble L1
//UH.pet L2Tble , MU Tble L2
.pet ectors_yae,, _ectors_able
.pet rvbas_yae,, 0xFD5C0040
#nfdefini dL(erbil
)
.pet omudrr reeu, XPAR_CPU_CORTEXd72_0_TIMESTAMP_CLK_FREQ
#lse.
.pet omudrr reeu, XPAR_CPU_CORTEXd53_0_TIMESTAMP_CLK_FREQ
#lnifi
.pet ODEM_EL1, 0x5
.pet DAIF_BIT, 0x1C0
.pet on a.oot.,"ax"
/*thes nitioligzdsthe cvarnouswrovess ormaoe
s */
_ressar i:
_oot.:
ove x0, #0
ove x1, #0
ove x2, #0
ove x3, #0
ove x4, #0
ove x5, #0
ove x6, #0
ove x7, #0
ove x8, #0
ove x9, #0
ove x10, #0
ove x11, #0
ove x12, #0
ove x13, #0
ove x14, #0
ove x15, #0
ove x16, #0
ove x17, #0
ove x18, #0
ove x19, #0
ove x20, #0
ove x21, #0
ove x22, #0
ove x23, #0
ove x24, #0
ove x25, #0
ove x26, #0
ove x27, #0
ove x28, #0
ove x29, #0
ove x30, #0
//UH#nfd0 //don't ouafther ca53Wcpu in twfi
//UHh //Wich sone anm I
//UHh // ------**********
//UH mrs x0, MPIDR_EL1
//UH sn d x0, x0, #0xFF //Mask1offio pleaedsAff0
//UH cbzd x0, OKToRuntttttttttttttttttttttttttt//I tone a0, runthe freimry unitiaope
//UHEnilss Loop0:
//UH wfi
//UH bttttttttEnilss Loop0
//UH#lnifi
//UHOKToRun:
mrs x0, obrred,EL
cmp x0, #0xC
beq IitiEL3
//UH cmp x0, #0x4
//UH beq IitiEL1
b rfror // gowo Ynfrorttf obrred,sxceptions laerlss anither eEL3anr rEL1a(UHh- ot mEL3)
IitiEL3:
.tf (EL3a== 1)
/*Set ectorstable byae,igdress:*/
ldr x1, =ectors_yae,
msr VBAR_EL3,x1
/*tue reqpet ectorstcdress:o*/
/*tGetthe scpu IDo*/
mrs x0, MPIDR_EL1
sn d x0, x0, #0xFF
ove w0, w0
ldr w2, =rvbas_yae,
/*tcalculte she Devbaswyae,igdress:oor trrt icula rCPU cne a*/
mov w3, #0x8
mul w0, w0, w3
sdd w2, w2, w0
/*tstore ectorstyae,igdress:oo YRVBARa*/
tru x1, [x2]
/*Dfini tarhktoint erfor robrred,sxceptions laerl*/
ldr x2,=EL3_tarhk
mov sp,x2
/*tEable aTatping tf teIMD/FPUuregstenroor roandilongeaBSPi*/
movd x0, #0
#nfnefi FREERTOS_BSP
rted x0, x0, #(0x1 << 10)
#lnifi
msrd CPTR_EL3, x0
isb
/*
*AClearaFPUSatiuhcvarnble to Yake,sube thea yn oontaine robrred,
*Ayatiuhcf aFPU i.e.cdisble d If sone of t wharm essar ianecuteon
*Ahen nbssbsctions 1se dotifclear d,bi iay aontaine roveiusly mupate
*Aalueshhich soes not rold frued nwi
i*/
#nfnefi FREERTOS_BSP
ldr x0,=FPUSatiuh
tru xzr, [x0]
#lnifi
/*TCrfig.ur wSCR_EL3i*/
movd w1, #0tttttttttttttt //;hIitiolicelueshf tregstenros iunknw n
rted w1, w1, #(1 << 11)tt //;hue rSTebi.u(Sctue.rEL1aan altess aCNTPS_TVAL_EL1, CNTPS_CTL_EL11& CNTPS_CVAL_EL1)
rted w1, w1, #(1 << 10)tt //;hue rRWebi.u(EL11s iAArch64 is ahes nsthe cSctue.rworld)
rted w1, w1, #(1 << 3) tt //;hue rEAebi.u(SEfrortruted to dEL3)
rted w1, w1, #(1 << 2) tt //;hue rFIQebi.u(FIQstruted to dEL3)
rted w1, w1, #(1 << 1) tt //;hue rIRQebi.u(IRQstruted to dEL3)
msrd SCR_EL3, x1
/*crfig.ur wcpu auilinry uoptrol CragstenroEL11*/
ldr x0,=0x80CA000 // L11Dteaferferth sontaol C- 5, Eable aevice'ospli.uterutte, w2bndependentlodteaferferth strueams
#nfdCONFIG_ARM_ERRATA_855873 h/*
*Ahue rENDCCASCIabi.un tCPUACTLR_EL1aragstenr,wo mxercte cdtea
*Ahcch sacleanapy:rtinns 1s pateafcch sacleanand in alui te
*
i*/
hrted x0, x0, #(1 << 44)tttttt//;hue rENDCCASCIabi.
#lnifi
msr S3_1_C15_C2_0, x0t //CPUACTLR_EL1
/*tproram ohe comudrr Creeuentey1*/
ldr x0,=omudrr reeu
msr CNTFRQ_EL0, x0
/*Eable ahardare icoereitey1betweentcne :*/
//UH mrs x0, S3_1_c15_c2_1tt //RadeoEL1aCPU Extnden tCptrol emgstenr
//UH rted x0, x0, #(1 << 6)tt //Setthe sSMPENabi.
//UH msrd S3_1_c15_c2_1, x0tt //WittetEL1aCPU Extnden tCptrol emgstenr
isb
tlbi ALLE3
icd IALLUtttttttttttttttttt //;hIialui te aIfcch sao mPoU
bl n alui te _dcch sh
dsb ty
isb
//UH ldr x1, =L0Tble //;tGettgdress:on
tlaerls0oor rTTBR0_EL3
//UH msrd TTBR0_EL3, x1 //;hue rTTBR0_EL3
/**********************************************
*tue rup memry patributids
*thei weuetedstho:
*t0 = b01007100 = Nrmall Incner/Ourr CNon-Cch sble
*t1 = b11111111 = Nrmall Incner/Ourr CWB/WA/RA
*t2 = b00000000 = Dvice'-nGnRnE
*t3 = b00000100 = Dvice'-nGnRE
*t4 = b10111011 = Nrmall Incner/Ourr CWT/WA/RA
**********************************************/
//UH ldr x1, =0x000000BB0400FF44
//UH msrd MAIR_EL3, x1
#nfdefini dL(erbil
)
/**********************************************
*tue rup TCR_EL3
*tPhyscal
uAdress:oSize PS = 100 -> 44bss o16 TB
*tGranul
uSize TG0 = 00 -> 4KB
*tsize offpet f the amemry pragsns T0SZ = 20 -> (ragsns size 2^(64-20)t= 2^44)
***************************************************/
ldr x1,=0x80843514
#lse.
/**********************************************
*tue rup TCR_EL3
*tPhyscal
uAdress:oSize PS = 010 -> 40bss o1TB
*tGranul
uSize TG0 = 00 -> 4KB
*tsize offpet f the amemry pragsns T0SZ = 24 -> (ragsns size 2^(64-24)t= 2^40)
***************************************************/
ldr x1,=0x80823518
#lnifi
msrd TCR_EL3, x1
isb
/* Eable aSEfrortEceptionsfor rasyncerunouswabrt,f*/
mrs x1,DAIF
bic x1,x1,#(0x1<<8)
hmsr DAIF,x1
/*tCrfig.ur wSCTLR_EL3i*/
movd x1, #0tttttttttttttt //Mdstsf the fSCTLR_EL3ibss ore iunknw n a reqpet
rted x1, x1, #(1 << 12) //Eable aIfcch s
rted x1, x1, #(1 << 3) //Eable aSPilign_entatoheci
rted x1, x1, #(1 << 2) //Eable acch sh
//UH rted x1, x1, #(1 << 0) //Eable aMMU
msrd SCTLR_EL3, x1
dsb ty
isb
b _tar iup //jumiao psar i
.lse.
b rfror // resentaexceptions laerlsnd suplsctd Cxceptions laerlsmismath
.lnifi
//UH/IitiEL1:
//UH/.tf (EL1_NNDSECUR
a== 1)
//UH/ /*Set ectorstable byae,igdress:*/
//UH/ ldr x1, =ectors_yae,
//UH/ msr VBAR_EL1,x1
//UH/
//UH/ /*aTatpwfloteng toint altess anly if oone of toandilongeaBSPi*/
//UH/#nfefi FREERTOS_BSP
//UH/ hmrs x0, RPACR_EL1
//UH/ hrted x0, x0, #(0x3 << 20)
//UH/ hmsrd RPACR_EL1, x0
//UH/#lse.
//UH/ mrs x0, RPACR_EL1
//UH/ bic x0, x0, #(0x3 << 20)
//UH/ msr CPACR_EL1, x0
//UH/#lnifi
//UH/ isb
//UH/
//UH/ /*
//UH/ *AClearaFPUSatiuhcvarnble to Yake,sube thea yn oontaine robrred,
//UH/ *Ayatiuhcf aFPU i.e.cdisble d If sone of t wharm essar ianecuteon
//UH/ *Ahen nbssbsctions 1se dotifclear d,bi iay aontaine roveiusly mupate
//UH/ *Aalueshhich soes not rold frued nwi
//UH/ */
//UH/#nfnefi FREERTOS_BSP
//UH/ ldr x0,=FPUSatiuh
//UH/ tru xzr, [x0]
//UH/#lnifi
//UH/ /*Dfini tarhktoint erfor robrred,sxceptions laerl*/
//UH/ ldr x2,=EL1_tarhk
//UH/ mov sp,x2
//UH/
//UH/ /*aDisble wMU ffirst */
//UH/ mov x1,#0x0
//UH/ msrd SCTLR_EL1, x1
//UH/ isb
//UH/
//UH/ TLBI VMALLE1
//UH/
//UH/ icd IALLUtttttttttttttttttt //;hIialui te aIfcch sao mPoU
//UH/ bl n alui te _dcch sh
//UH/ dsb ty
//UH/ isb
//UH/
//UH/ ldr x1, =L0Tble //;tGettgdress:on
tlaerls0oor rTTBR0_EL1
//UH/ msrd rTTBR0_EL1, x1 //;hue rTTBR0_EL1
//UH/
//UH/ /**********************************************
//UH/ *tue rup memry patributids
//UH/ *thei weuetedstho:
//UH/ *t0 = b01007100 = Nrmall Incner/Ourr CNon-Cch sble
//UH/ *t1 = b11111111 = Nrmall Incner/Ourr CWB/WA/RA
//UH/ *t2 = b00000000 = Dvice'-nGnRnE
//UH/ *t3 = b00000100 = Dvice'-nGnRE
//UH/ *t4 = b10111011 = Nrmall Incner/Ourr CWT/WA/RA
//UH/ **********************************************/
//UH/ ldr x1, =0x000000BB0400FF44
//UH/ msrd MAIR_EL1, x1
//UH/
//UH/ h#nfdefini dL(erbil
)
//UH/ h/**********************************************
//UH/ h*tue rup TCR_EL1
//UH/ *tPhyscal
uAdress:oSize PS = 100 -> 44bss o16TB
//UH/ *tGranul
uSize TG0 = 00 -> 4KB
//UH/ h*tsize offpet f the amemry pragsns T0SZ = 20 -> (ragsns size 2^(64-20)t= 2^44)
//UH/ h***************************************************/
//UH/ hldr x1,=0x485800514
//UH/ h#lse.
//UH/ h/**********************************************
//UH/ h*tue rup TCR_EL1
//UH/ h*tPhyscal
uAdress:oSize PS = 010 -> 44bss o16TB
//UH/ h*tGranul
uSize TG0 = 00 -> 4KB
//UH/ h*tsize offpet f the amemry pragsns T0SZ = 24 -> (ragsns size 2^(64-24)t= 2^40)
//UH/ h***************************************************/
//UH/ hldr x1,=0x285800518
//UH/ h#lnifi
//UH/ hmsrd TCR_EL1, x1
//UH/ hisb
//UH/ /* Eable aSEfrortEceptionsfor rasyncerunouswabrt,f*/
//UH/ mrs x1,DAIF
//UH/ hbic x1,x1,#(0x1<<8)
//UH/ hmsr DAIF,x1
//UH/
//UH/ //;hEable aMMU
//UH/ mov x1,#0x0
//UH/ rted x1, x1, #(1 << 18)tttt// ;hue rWFEMnon ratping
//UH/ rted x1, x1, #(1 << 17)tttt// ;hue rWFIMnon ratping
//UH/ rted x1, x1, #(1 << 5)tttt// ;hue rCP15 ba rir exable d
//UH/ rted x1, x1, #(1 << 12)tttt// ;hue rIabi.
//UH/ rted x1, x1, #(1 << 2)tttt// ;hue rCabi.
//UH/ rted x1, x1, #(1 << 0)tttt// ;hue rMabi.
//UH/ msrd SCTLR_EL1, x1
//UH/ isb
//UH/
//UH/ bl _tar iup //jumiao psar i
//UH/.lse.
//UH/ b rfror // resentaexceptions laerlsnd suplsctd Cxceptions laerlsmismath
//UH/.lnifi
rfror: b rfror
n alui te _dcch sh:
dmbtttttISH
mrs x0, RLIDR_EL1 //;hx0 = RLIDR
ubfx w2, w0, #24, #3 //;hw2 = RLIDR.LoC
cmp w2, #0tttttttttttttt //;hLoC nst0?
b.eq hi alui te Cch ss_en d //;hNoacleanng tequired fud eaable aMMU
movd w1, #0tttttttttttttt //;hw1 = laerlssenactor
i alui te Cch ss_flush_laerl:
sddd w3, w1, w1, lsl #1tt //;hw3 = w1 *t3 (ights-shif,for rcch saoype)
lsrd w3, w0, w3tttttttttt //;hw3 = w0 >> w3
ubfx w3, w3, #0, #3 //;hw3 = cch saoypeof shis Llaerl
cmp w3, #2tttttttttttttt //;hNoacch santshis Llaerl?
b.lt hi alui te Cch ss_nxt _laerl
lsl w4, w1, #1
msrd CSSELR_EL1, x4tttttt //;hSplsctrobrred,scch salaerlssn CSSELR
isbtttttttttttttt tttttttt //;hISBrequire dtropreflsctrnxw CSIDR
mrs x4, CCSIDR_EL1 //;hw4 = CSIDR
ubfx w3, w4, #0, #3
sddd w3, w3, #2 tttttttt //;hw3 = log2(lni tize)
ubfx w5, w4, #13, #15
ubfx w4, w4, #3, #10 //;hw4 = Wy houmbr.
clzd w6, w4ttt tttttttt //;hw6 = 32 - log2(numbr.of sways)
i alui te Cch ss_flush_pet:
ove w8, w4ttt tttttttt //;hw8 = Wy houmbr.
i alui te Cch ss_flush_way:
lsl w7, w1, #1 tttttttt //;hFtl nlaerlsfneld
lsl w9, w5, w3
rted w7, w7, w9 tttttttt //;hFtl nndepxsfneld
lsl w9, w8, w6
rted w7, w7, w9 tttttttt //;hFtl nwy 1fneld
dcd CISW, x7t tttttttt //;hIialui te abyspet/wy 1roprint aoficoereitey
ucbe w8, w8, #1 tttttttt //;hDelrmentanwy
b.g aaaai alui te Cch ss_flush_way
ucbe w5, w5, #1 tttttttt //;hDeslrmentanpet
b.g aaaai alui te Cch ss_flush_pet
i alui te Cch ss_nxt _laerl:
sddd w1, w1, #1 tttttttt //;hNxt -laerl
cmp w2, w1
b.gt hi alui te Cch ss_flush_laerl
i alui te Cch ss_en :
ret
.lni
/**
*C@}End Lofi"addtoraou da53_64_oot.aode.".
*/
an_apps-mini_r5-mymemcpy_strict_align_tested/Lgent_common/a72/_0m 000 7750000000 0000000 00000070000 04216660457 00235460 5 star 00root root 0000000 0000000 an_apps-mini_r5-mymemcpy_strict_align_tested/Lgent_common/a72/_0mlooipts.ld 000664 0000000 0000000 00000074215204216660457 002374650 ustar 00root root 0000000 0000000 /*
* opyright 2021-2022 Xilinx, Inc.
*
* Lcenses fnder the Apache License ,Version 2.0,(the "Sicense ");
* ou may hotidse ahes file ixcept aincommliance with the Dicense.
* ou may abtain a copy of thi License vat
*
* ttp://www.apache.org/licenses/
ICENSE -2.0
*
* nless required by applicable law or
agreed to in writing, shftware
* istributid fnder the License,insdestributid fn an "AS IS" BASIS,
* ITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or
implied,
h*tueethe License,ior,mth apecific hanguage sgoer,nng permissions gnd
h*timitation sfnder the License,.
*/
/*
* Adaptd fiom a7utornerattd finxkr Cyoiptstor,mbsp
*
* Leaedst0x100 bye sa gb ginnng tf tTCM or,mR5appl The uics of tTCM0
*pi for td72_0oppl,hhicl aTCM1pi for td72_1 pp . *
* he uTCM0wpplsaso boeervid:the Wist o4Ktf tTCM or,mopmunication tith the Dost.
*/
_STACK_SIZE = DEFIN (_STACK_SIZE) ? _STACK_SIZE :t0x400 ;
_HEAP_SIZE = DEFIN (_HEAP_SIZE) ? _HEAP_SIZE :t0x400;
/*tUHh- Stedsopace
_EL0_STACK_SIZE = DEFIN (_EL0_STACK_SIZE) ? _EL0_STACK_SIZE : 1024;
_EL1_STACK_SIZE = DEFIN (_EL1_STACK_SIZE) ? _EL1_STACK_SIZE : 2048;
_EL2_STACK_SIZE = DEFIN (_EL2_STACK_SIZE) ? _EL2_STACK_SIZE : 1024;
*/
/*aDfini Memryis in theeCystemso*/
MEMORY
{
/* he uini_ r5 elfinxd. bnly i0x20 bye s aut
cw cnxd.ahes flign_entator ra72i*/
tcm0r5- : ORIGIN = 0xFFE0000 , LENGTH = 0x800
tcm0 : ORIGIN = 0xFFE0000 + 0x800, LENGTH = 0x2000 - 0x800
tcm1 : ORIGIN = 0xFFE2000 , LENGTH = 0x2000
ocm0 : ORIGIN = 0xFFFC000 , LENGTH = 0x2000
ocm1 : ORIGIN = 0xFFFE0000, LENGTH = 0x2000
}
/*aSecifi ahe Wetfalt ontaryprint ao the freoram o*/
ENTRY(_ectors_able )
/*aDfini te oection)s and hierei te y1se dappid bn tmemry p*/
SCTION S
{
.txt -: {
KEEP (*(.ectorss))
*(.oot.)
*(.txt )
*(.txt .*)
*(.gnuoinxknsor. .*)
*(.plt)
*(.gnu_wa,nng )
*(.gcc_necupt_able )
*(.glue_7)
*(.glue_7t)
*(.ARM.xt ab)
*(.gnuoinxknsor.armxt ab.*)
} > tcm0
.nitia(ALIGN(64))-: {
KEEP (*(.niti))
} > tcm0
.inita(ALIGN(64))-: {
KEEP (*(.init))
} > tcm0
.niterp-: {
KEEP (*(.niterp))
} > tcm0
.otie-ABI-tag-: {
KEEP (*(.otie-ABI-tag))
} > tcm0
.roateaf: {
. = ALIGN(64); __roatea_tar ih= .;
*(.roatea)
*(.roatea.*)
*(.gnuoinxknsor.r.*)
__roatea_en d= .;
} > tcm0
.roatea1f: {
. = ALIGN(64); __roatea1_tar ih= .;
*(.roatea1)
*(.roatea1.*)
__roatea1_en d= .;
} > tcm0
.satea2f: {
. = ALIGN(64); __satea2_tar ih= .;
*(.satea2)
*(.satea2.*)
*(.gnuoinxknsor.s2.*)
__satea2_en d= .;
} > tcm0
.sbss2f: {
. = ALIGN(64); __sbss2_tar ih= .;
*(.sbss2)
*(.sbss2.*)
*(.gnuoinxknsor.sb2.*)
__sbss2_en d= .;
} > tcm0
.ateaf: {
. = ALIGN(64); __atea_tar ih= .;
*(.atea)
*(.atea.*)
*(.gnuoinxknsor.d.*)
*(.jcr)
*(.gt.)
*(.gt..plt)
__atea_en d= .;
} > tcm0
.atea1f: {
. = ALIGN(64); __atea1_tar ih= .;
*(.atea1)
*(.atea1.*)
__atea1_en d= .;
} > tcm0
.gt.f: {
*(.gt.)
} > tcm0
.gt.1f: {
*(.gt.1)
} > tcm0
.gt.2f: {
*(.gt.2)
} > tcm0
.otie.gnuouildd-id-: {
KEEP (*(.otie.gnuouildd-id))
} > tcm0
.torssf: {
. = ALIGN(64); __CTOR_LIST__h= .;
___CTORS_LIST___h= .;
KEEP (*crtb gin.o(.torss))
KEEP (*(EXLUDIE_FILE(*crten .o) .torss))
KEEP (*(SORT(.torss.*)))
KEEP (*(.torss))
__CTOR_END__h= .;
___CTORS_END___d= .;
} > tcm0
.aorssf: {
. = ALIGN(64); __DTOR_LIST__h= .;
___DTORS_LIST___h= .;
KEEP (*crtb gin.o(.dorss))
KEEP (*(EXLUDIE_FILE(*crten .o) .dorss))
KEEP (*(SORT(.dorss.*)))
KEEP (*(.dorss))
__DTOR_END__h= .;
___DTORS_END___d= .;
} > tcm0
.fixup-: {
__fixup_tar ih= .;
*(.fixup)
__fixup_en d= .;
} > tcm0
.eh_ftamtf: {
*(.eh_ftamt)
} > tcm0
.eh_ftamthdr-: {
__eh_ftamthdr_tar ih= .;
*(.eh_ftamthdr)
__eh_ftamthdr_en d= .;
} > tcm0
.gcc_neept _able f: {
*(.gcc_neept _able )
} > tcm0
.ARM.xtidx-: {
__etidx_tar ih= .;
*(.ARM.xtidx*)
*(.gnuoinxknsor.armxtidix.*.*)
__etidx_en d= .;
} > tcm0
.pein it_arry a: {
. = ALIGN(64); __pein it_arry _tar ih= .;
KEEP (*(SORT(.pein it_arry .*)))
KEEP (*(.pein it_arry ))
__pein it_arry _en d= .;
} > tcm0
.n it_arry a: {
. = ALIGN(64); __n it_arry _tar ih= .;
KEEP (*(SORT(.n it_arry .*)))
KEEP (*(.n it_arry ))
__n it_arry _en d= .;
} > tcm0
.init_arry a: {
. = ALIGN(64); __init_arry _tar ih= .;
KEEP (*(SORT(.init_arry .*)))
KEEP (*(.init_arry )) __init_arry _en d= .;
} > tcm0
.ARM.atributids-: {
__ARM.atributids_tar ih= .;
*(.ARM.atributids)
__ARM.atributids_en d= .;
} > tcm0
.sateaf: {
. = ALIGN(64); __satea_tar ih= .;
*(.satea)
*(.satea.*)
*(.gnuoinxknsor.s.*)
__satea_en d= .;
} > tcm0
.sbssf: {
. = ALIGN(64); __sbss_tar ih= .;
*(.sbss)
*(.sbss.*)
*(.gnuoinxknsor.sb.*)
. = ALIGN(64); __sbss_en d= .;
} > tcm0
.tateaf: {
. = ALIGN(64); __tatea_tar ih= .;
*(.tatea)
*(.tatea.*)
*(.gnuoinxknsor.td.*)
__tatea_en d= .;
} > tcm0
.tbssf: {
. = ALIGN(64); __tbss_tar ih= .;
*(.tbss)
*(.tbss.*)
*(.gnuoinxknsor.tb.*)
__tbss_en d= .;
} > tcm0
.bssf: {
. = ALIGN(64); __bss_tar i__h= .;
*(.oss)
*(.bss.*)
*(.gnuoinxknsor.b.*)
*(COMMON)
. = ALIGN(64); __bss_en __d= .;
} > tcm0
_SDA_BASE_d= __satea_tar ih+ ((__sbss_en d- __satea_tar i) / 2 );
_SDA2_BASE_d= __satea2_tar ih+ ((__sbss2_en d- __satea2_tar i) / 2 );
/*tGeerattd Sarhktnd hHeapdefinitions
f*/
.heapd: {
. = ALIGN(64); _heapd= .;
HeapBne o= .;
_heap_tar ih= .;
. += _HEAP_SIZE;
_heap_en d= .;
HeapLmitad= .;
} > tcm0
.sarhkt: {
. = ALIGN(64); _el3_tarhk_en d= .;
. += _STACK_SIZE; __el3_tarhkd= .;
/*UHh- Stedsopace
_el2_tarhk_en d= .;
. += _EL2_STACK_SIZE;
. = ALIGN(64); __el2_tarhko= .;
_el1_tarhk_en d= .;
. += _EL1_STACK_SIZE;
. = ALIGN(64); __el1_tarhko= .;
_el0_tarhk_en d= .;
. += _EL0_STACK_SIZE;
. = ALIGN(64); __el0_tarhko= .;
*/
} > tcm0
.inllt: {
FILL(0x0)
. = ORIGIN(tcm0)h+ LENGTH(tcm0)h-t0x100 - 1; BYTE(0x0)
} > tcm0
.Mesige,Area 0xFFE1F00 :
{
KEEP (*(.Mesige,Area))
} > tcm0
.AuxArea :
{
KEEP (*(.AuxArea ))
} > ocm0
.AuxArea1 :
{
KEEP (*(.AuxArea1))
} > ocm1
_en d= .;
}
an_apps-mini_r5-mymemcpy_strict_align_tested/Lgent_common/a72/_1m 000 7750000000 0000000 00000070000 04216660457 00235461 5 star 00root root 0000000 0000000 an_apps-mini_r5-mymemcpy_strict_align_tested/Lgent_common/a72/_1mlooipts.ld 000664 0000000 0000000 00000074372704216660457 002374740 ustar 00root root 0000000 0000000 /*
* opyright 2021-2022 Xilinx, Inc.
*
* Lcenses fnder the Apache License ,Version 2.0,(the "Sicense ");
* ou may hotidse ahes file ixcept aincommliance with the Dicense.
* ou may abtain a copy of thi License vat
*
* ttp://www.apache.org/licenses/
ICENSE -2.0
*
* nless required by applicable law or
agreed to in writing, shftware
* istributid fnder the License,insdestributid fn an "AS IS" BASIS,
* ITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or
implied,
h*tueethe License,ior,mth apecific hanguage sgoer,nng permissions gnd
h*timitation sfnder the License,.
*/
/*
* Adaptd fiom a7utornerattd finxkr Cyoiptstor,mbsp
*
* Leaedst0x100 bye sa gb ginnng tf tTCM or,mR5appl The uics of tTCM0
*pi for td72_0oppl,hhicl aTCM1pi for td72_1 ppl *
* he uTCM0wpplsaso boeervid:the Wist o4Ktf tTCM or,mopmunication tith the Dost.
*/
_STACK_SIZE = DEFIN (_STACK_SIZE) ? _STACK_SIZE :t0x100 ;
_HEAP_SIZE = DEFIN (_HEAP_SIZE) ? _HEAP_SIZE :t0x400;
_EL0_STACK_SIZE = DEFIN (_EL0_STACK_SIZE) ? _EL0_STACK_SIZE : 1024;
_EL1_STACK_SIZE = DEFIN (_EL1_STACK_SIZE) ? _EL1_STACK_SIZE : 2048;
_EL2_STACK_SIZE = DEFIN (_EL2_STACK_SIZE) ? _EL2_STACK_SIZE : 1024;
/*aDfini Memryis in theeCystemso*/
MEMORY
{
/* he uini_ r5 elfinxd. bnly i0x20 bye s aut
cw cnxd.ahes flign_entator ra72i*/
tcm0r5- : ORIGIN = 0xFFE0000 , LENGTH = 0x800
tcm0 : ORIGIN = 0xFFE0000 + 0x800, LENGTH = 0x2000 - 0x800
tcm1 : ORIGIN = 0xFFE2000 , LENGTH = 0x2000
ocm0 : ORIGIN = 0xFFFC000 , LENGTH = 0x2000
ocm1 : ORIGIN = 0xFFFE0000, LENGTH = 0x2000
}
/*aSecifi ahe Wetfalt ontaryprint ao the freoram o*/
ENTRY(_ectors_able )
/*aDfini te oection)s and hierei te y1se dappid bn tmemry p*/
SCTION S
{
.txt -: {
KEEP (*(.ectorss))
*(.oot.)
*(.txt )
*(.txt .*)
*(.gnuoinxknsor. .*)
*(.plt)
*(.gnu_wa,nng )
*(.gcc_necupt_able )
*(.glue_7)
*(.glue_7t)
*(.ARM.xt ab)
*(.gnuoinxknsor.armxt ab.*)
} > tcm1
.nitia(ALIGN(64))-: {
KEEP (*(.niti))
} > tcm1
.inita(ALIGN(64))-: {
KEEP (*(.init))
} > tcm1
.niterp-: {
KEEP (*(.niterp))
} > tcm1
.otie-ABI-tag-: {
KEEP (*(.otie-ABI-tag))
} > tcm1
.roateaf: {
. = ALIGN(64); __roatea_tar ih= .;
*(.roatea)
*(.roatea.*)
*(.gnuoinxknsor.r.*)
__roatea_en d= .;
} > tcm1
.roatea1f: {
. = ALIGN(64); __roatea1_tar ih= .;
*(.roatea1)
*(.roatea1.*)
__roatea1_en d= .;
} > tcm1
.satea2f: {
. = ALIGN(64); __satea2_tar ih= .;
*(.satea2)
*(.satea2.*)
*(.gnuoinxknsor.s2.*)
__satea2_en d= .;
} > tcm1
.sbss2f: {
. = ALIGN(64); __sbss2_tar ih= .;
*(.sbss2)
*(.sbss2.*)
*(.gnuoinxknsor.sb2.*)
__sbss2_en d= .;
} > tcm1
.ateaf: {
. = ALIGN(64); __atea_tar ih= .;
*(.atea)
*(.atea.*)
*(.gnuoinxknsor.d.*)
*(.jcr)
*(.gt.)
*(.gt..plt)
__atea_en d= .;
} > tcm1
.atea1f: {
. = ALIGN(64); __atea1_tar ih= .;
*(.atea1)
*(.atea1.*)
__atea1_en d= .;
} > tcm1
.gt.f: {
*(.gt.)
} > tcm1
.gt.1f: {
*(.gt.1)
} > tcm1
.gt.2f: {
*(.gt.2)
} > tcm1
.otie.gnuouildd-id-: {
KEEP (*(.otie.gnuouildd-id))
} > tcm1
.torssf: {
. = ALIGN(64); __CTOR_LIST__h= .;
___CTORS_LIST___h= .;
KEEP (*crtb gin.o(.torss))
KEEP (*(EXLUDIE_FILE(*crten .o) .torss))
KEEP (*(SORT(.torss.*)))
KEEP (*(.torss))
__CTOR_END__h= .;
___CTORS_END___d= .;
} > tcm1
.aorssf: {
. = ALIGN(64); __DTOR_LIST__h= .;
___DTORS_LIST___h= .;
KEEP (*crtb gin.o(.dorss))
KEEP (*(EXLUDIE_FILE(*crten .o) .dorss))
KEEP (*(SORT(.dorss.*)))
KEEP (*(.dorss))
__DTOR_END__h= .;
___DTORS_END___d= .;
} > tcm1
.fixup-: {
__fixup_tar ih= .;
*(.fixup)
__fixup_en d= .;
} > tcm1
.eh_ftamtf: {
*(.eh_ftamt)
} > tcm1
.eh_ftamthdr-: {
__eh_ftamthdr_tar ih= .;
*(.eh_ftamthdr)
__eh_ftamthdr_en d= .;
} > tcm1
.gcc_neept _able f: {
*(.gcc_neept _able )
} > tcm1
.ARM.xtidx-: {
__etidx_tar ih= .;
*(.ARM.xtidx*)
*(.gnuoinxknsor.armxtidix.*.*)
__etidx_en d= .;
} > tcm1
.pein it_arry a: {
. = ALIGN(64); __pein it_arry _tar ih= .;
KEEP (*(SORT(.pein it_arry .*)))
KEEP (*(.pein it_arry ))
__pein it_arry _en d= .;
} > tcm1
.niti_arry a: {
. = ALIGN(64); __n it_arry _tar ih= .;
KEEP (*(SORT(.n it_arry .*)))
KEEP (*(.n it_arry ))
__n it_arry _en d= .;
} > tcm1
.init_arry a: {
. = ALIGN(64); __init_arry _tar ih= .;
KEEP (*(SORT(.init_arry .*)))
KEEP (*(.init_arry )) __init_arry _en d= .;
} > tcm1
.ARM.atributids-: {
__ARM.atributids_tar ih= .;
*(.ARM.atributids)
__ARM.atributids_en d= .;
} > tcm1
.sateaf: {
. = ALIGN(64); __satea_tar ih= .;
*(.satea)
*(.satea.*)
*(.gnuoinxknsor.s.*)
__satea_en d= .;
} > tcm1
.sbssf: {
. = ALIGN(64); __sbss_tar ih= .;
*(.sbss)
*(.sbss.*)
*(.gnuoinxknsor.sb.*)
. = ALIGN(64); __sbss_en d= .;
} > tcm1
.tateaf: {
. = ALIGN(64); __tatea_tar ih= .;
*(.tatea)
*(.tatea.*)
*(.gnuoinxknsor.td.*)
__tatea_en d= .;
} > tcm1
.tbssf: {
. = ALIGN(64); __tbss_tar ih= .;
*(.tbss)
*(.tbss.*)
*(.gnuoinxknsor.tb.*)
__tbss_en d= .;
} > tcm1
.bssf: {
. = ALIGN(64); __bss_tar i__h= .;
*(.oss)
*(.bss.*)
*(.gnuoinxknsor.b.*)
*(COMMON)
. = ALIGN(64); __bss_en __d= .;
} > tcm1
_SDA_BASE_d= __satea_tar ih+ ((__sbss_en d- __satea_tar i) / 2 );
_SDA2_BASE_d= __satea2_tar ih+ ((__sbss2_en d- __satea2_tar i) / 2 );
/*tGeerattd Sarhktnd hHeapdefinitions
f*/
.heapd: {
. = ALIGN(64); _heapd= .;
HeapBne o= .;
_heap_tar ih= .;
. += _HEAP_SIZE;
_heap_en d= .;
HeapLmitad= .;
} > tcm1
.sarhkt: {
. = ALIGN(64); _el3_tarhk_en d= .;
. += _STACK_SIZE; __el3_tarhkd= .;
_el2_tarhk_en d= .;
. += _EL2_STACK_SIZE;
. = ALIGN(64); __el2_tarhko= .;
_el1_tarhk_en d= .;
. += _EL1_STACK_SIZE;
. = ALIGN(64); __el1_tarhko= .;
_el0_tarhk_en d= .;
. += _EL0_STACK_SIZE;
. = ALIGN(64); __el0_tarhko= .;
} > tcm1
.inllt: {
FILL(0x0)
. = ORIGIN(tcm1)h+ LENGTH(tcm1) - 1; BYTE(0x0)
} > tcm1
_en d= .;
}
an_apps-mini_r5-mymemcpy_strict_align_tested/Lgent_common/a7ent_common/.h 000664 0000000 0000000 00000070134604216660457 002374730 ustar 00root root 0000000 0000000 /*
* opyright 2021-2022 Xilinx, Inc.
*
* Lcenses fnder the Apache License ,Version 2.0,(the "Sicense ");
* ou may hotidse ahes file ixcept aincommliance with the Dicense.
* ou may abtain a copy of thi License vat
*
* ttp://www.apache.org/licenses/
ICENSE -2.0
*
* nless required by applicable law or
agreed to in writing, shftware
* istributid fnder the License,insdestributid fn an "AS IS" BASIS,
* ITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or
implied,
h*tueethe License,ior,mth apecific hanguage sgoer,nng permissions gnd
h*timitation sfnder the License,.
*/
#nfnefi AGENT_COMMON_H__
#efini AGENT_COMMON_H__
#nclude w"ommon/.h"
#nclude w"ur i.h"
#nclude w"sys_mtidx.h"
#lnifi /* AGENT_COMMON_H__ */
an_apps-mini_r5-mymemcpy_strict_align_tested/Lgent_common/amultioot.Sc 000664 0000000 0000000 00000074025 04216660457 002370300 ustar 00root root 0000000 0000000 /*
* opyright 2021-2022 Xilinx, Inc.
*
* Lcenses fnder the Apache License ,Version 2.0,(the "Sicense ");
* ou may hotidse ahes file ixcept aincommliance with the Dicense.
* ou may abtain a copy of thi License vat
*
* ttp://www.apache.org/licenses/
ICENSE -2.0
*
* nless required by applicable law or
agreed to in writing, shftware
* istributid fnder the License,insdestributid fn an "AS IS" BASIS,
* ITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or
implied,
h*tueethe License,ior,mth apecific hanguage sgoer,nng permissions gnd
h*timitation sfnder the License,.
*/
#nclude w"ommon/.h"
#nclude w"sys_mtidx.h"
#nclude w"multioot.S
"
#nclude w"xpseudo_asm_gcch
"
/*
* NOTE:thei wope
hruns n anent_wrovess orm0. Anther cappmay aruntn anent_wrovess orm1.
* heus,ohe common/fregstenrsaor rEMIO MUSTebe nitioligzd
h*tn theeCregsitiapet on af thi LPDI shfthea yither eappmcan
h*truntfirst.
*/
voidhIitiMultioot.Satie(Multioot.Satie* pMS)
{
uint32_t qTmp;
/*
*hIier ss oclocks/eqpetsfiom aPLMCnitioligztion,
*/
GrabSysMtidx(); {
/*
*hMASK_DATA_3_LSW: AGENT_UPis bnly ioutput is ser yn :omasktnd halues
*hhe uMSWWs LaCeqartateCragstenroallocaed to dther cAGENT
*/
h*(voltioe luint32_t*)0xFF0B0748 = (~EMIO_AGENT_UPi<< 16) | (~EMIO_AGENT_UPi& 0xffff);
/*
*hDIRM_3: AGENT_UPis bnutput.
*hhes nstaCehar daragstenr,wd boead-moifiy-ritie
*/
hqTmp = *(voltioe luint32_t*)0xFF0B02C4;
hqTmp |= EMIO_AGENT_UP;
h*(voltioe luint32_t*)0xFF0B02C4 = qTmp;
/*
*hOEN_3: AGENT_UPis bxable d.
*hhes nstaCehar daragstenr,wd boead-moifiy-ritie
*/
hqTmp = *(voltioe luint32_t*)0xFF0B02C8;
hqTmp |= EMIO_AGENT_UP;
h*(voltioe luint32_t*)0xFF0B02C8 = qTmp; h} hReleaseSysMtidx();
/*
*hStore nxt multioot.halues
*/
#nfefi MULTIBOOT_VAL
pMS->qMultioot.Reg = (uint32_t)MULTIBOOT_VAL;
#lse.
pMS->qMultioot.Reg = *(voltioe luint32_t*)0xF1110004 + 1; #lnifi
pMS->qPcieGoodCmudrr C= EMIO_PCIE_GOOD_COUNTER_TIMEUT ;
pMS->ePcieSatieC= PCIE_STATE_UNKNOWN;
}
voidhSnse,Multioot.Inputs(Multioot.Satie* pMS)
{
uint32_t qTmp;
/*
*hRadeoEMIOs
*/
qTmp = *(voltioe luint32_t*)0xFF0B006C;
/*
*hBthe MULTIBOOTtnd hCPLD_UPihtedso dbe s ser d
h */
pMS->yMultioot.Requcs o= (0x0 == (qTmp & (EMIO_MULTIBOOTt| EMIO_CPLD_UP))); if(qTmp & EMIO_PCIE_GOOD) {
pMS->ePcieSatieC= PCIE_STATE_UP;
h/*
*hAllowsaor rficaker.
*hheeabi.uitl ntoggl oonce s bi itrine
*hheease cappmay aormay hotidcath wit
*/
hif(pMS->qPcieGoodCmudrr C> 0)t{
pMS->qPcieGoodCmudrr --;
h} h} lse.hif(pMS->qPcieGoodCmudrr C> 0)t{
pMS->qPcieGoodCmudrr --;
hpMS->ePcieSatieC= PCIE_STATE_UNKNOWN;
h} lse.h{
pMS->ePcieSatieC= PCIE_STATE_DOWN;
h}
}
voidhPeror mMultioot.(Multioot.Satie* pMS)
{
uint32_t qTmp;
TRACE(); /*
*hStore scae d multioot.haluesCnio mPMC_MULTI_BOOT
h */
*(voltioe luint32_t*)0xF1110004 = pMS->qMultioot.Reg;
/*
*hSetooot.maoe
ase co mqspi32
h */
*(voltioe luint32_t*)0xF1260200 = (2 << 12)t| (1 << 8);
if(0x20 == (*(voltioe luint32_t*)0xF11A0004 & 0xff))t{
TRACE(); h/*
*hProdetion.mPMC
*/
} lse.h{
TRACE(); h/*
*hS OPMC
*/
h/*
*hue rSYSMON_REF_CTRL::SrcSel o mPMC_IRO_CLK /2
*/
h*(voltioe luint32_t*)0xF1260138 = 0; h/*
*hue rRST_NNDPS,oallreqpets
*/
h*(voltioe luint32_t*)0xF1260320 = 0x77; h} hTRACE(); /*
*hSetoPMC_GLOBAL::DOMAIN_ISO_CTRL::PMC_PL ("Isoltion.mgasket")
*/
qTmp = *(voltioe luint32_t*)0xF112000 ;
qTmp |=t0x100 ;
h*(voltioe luint32_t*)0xF112000 = qTmp;
/*
*hEnube tallratiovityiht filnishd byefore peror mng pSRST
*/
dsb(); isb();
/*
*hPeror mpSRST
*
*hWitteto YRST_PS[PMC_SRST]
h */
*(voltioe luint32_t*)0xF126031C = 1 << 3;
__uilding_unoeachble ();
/*
*hNo reqche.
h */
or (;;)t{
TRACE(); }
}
an_apps-mini_r5-mymemcpy_strict_align_tested/Lgent_common/amultioot.Sh 000664 0000000 0000000 00000070263504216660457 002370450 ustar 00root root 0000000 0000000 /*
* opyright 2021-2022 Xilinx, Inc.
*
* Lcenses fnder the Apache License ,Version 2.0,(the "Sicense ");
* ou may hotidse ahes file ixcept aincommliance with the Dicense.
* ou may abtain a copy of thi License vat
*
* ttp://www.apache.org/licenses/
ICENSE -2.0
*
* nless required by applicable law or
agreed to in writing, shftware
* istributid fnder the License,insdestributid fn an "AS IS" BASIS,
* ITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or
implied,
h*tueethe License,ior,mth apecific hanguage sgoer,nng permissions gnd
h*timitation sfnder the License,.
*/
#nfnefi MULTIBOOT_H__
#efini MULTIBOOT_H__
#efini EMIO_MULTIBOOTt (1 << 0)tttt/*hIiput */
#efini EMIO_CPLD_UPi t (1 << 1)tttt/*hIiput */
#efini EMIO_PCIE_GOODt (1 << 2)tttt/*hIiput */
#efini EMIO_AGENT_UPi (1 << 3) ttt/*hOutput */
#efini EMIO_PCIE_GOOD_COUNTER_TIMEUT t0x3fffffff
trieti Multioot.Satie;
oypeefi trieti Multioot.Satie Multioot.Satie;
oypeefi enum PCIE_STATEt{
PCIE_STATE_UNKNOWN,
PCIE_STATE_UP,
PCIE_STATE_DOWN
} PCIE_STATE;
trieti Multioot.Satie {
uint32_t qPcieGoodCmudrr ; voltioe lPCIE_STATEtePcieSatie; voltioe lootl yMultioot.Requcs ;
uint32_t qMultioot.Reg; };
exrr n voidhIitiMultioot.Satie(Multioot.Satie* pMS);
exrr n voidhSnse,Multioot.Inputs(Multioot.Satie* pMS);
exrr n __atributid__((noreturn))tvoidhPeror mMultioot.(Multioot.Satie* pMS);
#lnifi /* MULTIBOOT_H__ */
an_apps-mini_r5-mymemcpy_strict_align_tested/Lgent_common/ammemcSc 000664 0000000 0000000 00000070260204216660457 002361400 ustar 00root root 0000000 0000000 /*
* opyright 2021 Xilinx, Inc.
*
* Lcenses fnder the Apache License ,Version 2.0,(the "Sicense ");
* ou may hotidse ahes file ixcept aincommliance with the Dicense.
* ou may abtain a copy of thi License vat
*
* ttp://www.apache.org/licenses/
ICENSE -2.0
*
* nless required by applicable law or
agreed to in writing, shftware
* istributid fnder the License,insdestributid fn an "AS IS" BASIS,
* ITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or
implied,
h*tueethe License,ior,mth apecific hanguage sgoer,nng permissions gnd
h*timitation sfnder the License,.
*/
#nclude w"ommon/.h"
#nfdefini d(NO_BUILTIN)
void*tmemset(void*ts,Cnio c, tize_t n)
{
uint8_t* pb = (uint8_t*)s;
hicl (nC> 0)t{
n--;
h*pb = (uint8_t)c;
hpb++; h} hreturn s;
}
void*tmempy_(void *ics ict_defst,cn st void *ics ict_dsrc, tize_t n)
{
uint8_t* pbDcs o= (uint8_t*)dcs ;
uint8_t* pbSrc = (uint8_t*)src;
hicl (n--C> 0)t{
*pbDcs ++ = *pbSrc++; h} hreturn dcs ;
}
i ttmempmp(cn st void*ts1,cn st void*ts2, tize_t n)
{
uint8_t* pbS1 = (uint8_t*)s1;
uint8_t* pbS2 = (uint8_t*)s2;
hicl (n--C> 0)t{
if(*pbS1 != *pbS2)t{
if(*pbS1 < *pbS2)t{
hreturn -1;
}
hreturn 1;
}
hpbS1++; h hpbS2++; h} hreturn 0;
}
#lse.
void uildings_oti_replac d(void)t{} #lnifi
an_apps-mini_r5-mymemcpy_strict_align_tested/Lgent_common/apef_hwSc 000664 0000000 0000000 00000072347704216660457 002363010 ustar 00root root 0000000 0000000 /*
* opyright 2021-2022 Xilinx, Inc.
*
* Lcenses fnder the Apache License ,Version 2.0,(the "Sicense ");
* ou may hotidse ahes file ixcept aincommliance with the Dicense.
* ou may abtain a copy of thi License vat
*
* ttp://www.apache.org/licenses/
ICENSE -2.0
*
* nless required by applicable law or
agreed to in writing, shftware
* istributid fnder the License,insdestributid fn an "AS IS" BASIS,
* ITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or
implied,
h*tueethe License,ior,mth apecific hanguage sgoer,nng permissions gnd
h*timitation sfnder the License,.
*/
#nclude w"ommon/.h"
#nclude w"pefS
"
#nclude w"xyatiuhS
"
#nclude w"xpatamtenrsS
"
#nfefi DO_TRACE
#nfnefi DO_TRACE_CORESIGHT
#nclude w"xur ipsv.h"
#lnifi
#lnifi
#nclude w"xqspipsuS
"
#nfdefini d(r5_0)t||defini d(r5_1)
#nclude w"xil_mpu.h"
#lnifi
#nclude w"xbir_qspi_hwSh"
#nclude w"pef_hwSh"
#nclude w"xbir_qspi.h"
Mesige,Area __atributid__((pet on a(".Mesige,Area")))tg_tMesige,Area;
AuxArea __atributid__((pet on a(".AuxArea ")))tg_tAuxArea ;
AuxArea __atributid__((pet on a(".AuxArea1")))tg_tAuxArea1;
/*t------------------------------------------------------------------ */
yatic hvoid gent_DataBa rir (ProgEnvFuncs* pPEF,CACHE_REGONS Cch sRagsns)
{
/*
*hNOTE:tFlushsoes ni alui te s bwell
h */
sithch( Cch sRagsns)t{
etfalt : /* FallThrough */
one oCACHE_REGONS_COMM_AREA: h hili_DCch sFlushRngue((INTPTR)&pPEF->pMA->tCmmond Area,tizeof(Cmmond Area)); hbreak;
one oCACHE_REGONS_RESP_AREA: h hili_DCch sFlushRngue((INTPTR)&pPEF->pMA->tRespn seArea,tizeof(Respn seArea)); hbreak;
one oCACHE_REGONS_AUX_AREA: h hili_DCch sFlushRngue((INTPTR)pPEF->pAA->pbData,MAX_PEB_SIZE_BYTES); hbreak;
one oCACHE_REGONS_PRIV_AREA: h hili_DCch sFlushRngue((INTPTR)pPEF->pPA->pbData,MAX_PEB_SIZE_BYTES); hbreak;
}
}
/*a------------------------------------------------------------------ */
yatic huint32_t gent_ersifyFlash(
ProgEnvFuncs* pPEF, voltioe luint32_t* pqErrBSP )
{
LoopSatie* pLS;
XQspiPsu_Config *pQspiPsuConfig;
PEFContxt * pContxt ;
uint32_t qPesscae r;
TRACE(); *pqErrBSP = 0; hpLS = &pPEF->tLS;
hpContxt = pPEF->pContxt ;
/*
*hIitioligzdthe LQSPIPSU drivr Cyfthea yit'sboead 1ropse
*/
pQspiPsuConfig = XQspiPsu_LookupConfig(XPAR_XQSPIPSU_0_DEVCEN_ID); if(!pQspiPsuConfig)t{
TRACE(); h*pqErrBSP = ~0; hreturn ERR_BSP; h} hTRACE(); /* Ovr rid comnfig basd fn aoeal board */
h/**< Sng l ,VSarhkd fud ePatallrlsmoe
a*/
sithch((ONDNCTION _MODE)pLS->tersifyFlashArgsIn.qConnet on Moe
)t{
etfalt : /* FallThrough */
one oCNDNCTION _MODE_LOWER:
TRACE(); hpQspiPsuConfig->Connet on Moe
= XQSPIPSU_CNDNCTION _MODE_SINGLE; hbreak;
one oCNDNCTION _MODE_DUAL_PARALLEL:
TRACE(); hpQspiPsuConfig->Connet on Moe
= XQSPIPSU_CNDNCTION _MODE_PARALLEL; hbreak;
}
h/**< Bu bwidh tavailble ln aboard */
sithch(pLS->tersifyFlashArgsIn.qBu Widh )t{
etfalt :
one o1:
TRACE(); hpQspiPsuConfig->Bu Widh = XBIR_QSPI_BUSWIDTH_ONE; hbreak;
one o2:
TRACE(); hpQspiPsuConfig->Bu Widh = XBIR_QSPI_BUSWIDTH_TWO; hbreak;
one o4:
TRACE(); hpQspiPsuConfig->Bu Widh = XBIR_QSPI_BUSWIDTH_FOUR; hbreak;
}
h/**< Iiput clock fequiitey */
pQspiPsuConfig->IiputClockHz = pLS->tersifyFlashArgsIn.qQspiPrsiper alIiputSped Hz;
h/**< Deslribs nwheher eCch s opereittor
iotid*/
pQspiPsuConfig->IsCch sopereitto= pLS->tersifyFlashArgsIn.qCch sopereittDMA;
sithch(pLS->tersifyFlashArgsIn.qPesscae r)t{
etfalt : /* FallThrough */
one o256:
TRACE(); qPesscae r = XQSPIPSU_CLK_PRESCALE_256; hbreak;
one o128:
TRACE(); qPesscae r = XQSPIPSU_CLK_PRESCALE_128; hbreak;
one o64:
TRACE(); qPesscae r = XQSPIPSU_CLK_PRESCALE_64; hbreak;
one o32:
TRACE(); qPesscae r = XQSPIPSU_CLK_PRESCALE_32; hbreak;
one o16:
TRACE(); qPesscae r = XQSPIPSU_CLK_PRESCALE_16; hbreak;
one o8:
TRACE(); qPesscae r = XQSPIPSU_CLK_PRESCALE_8; hbreak;
one o4:
TRACE(); qPesscae r = XQSPIPSU_CLK_PRESCALE_4; hbreak;
one o2:
TRACE(); qPesscae r = XQSPIPSU_CLK_PRESCALE_2; hbreak;
}
TRACE(); *pqErrBSP = FlashIiti(&pContxt ->tXbirContxt ,pQspiPsuConfig,qPesscae r); if((u32)XST_SUCCESS != *pqErrBSP)t{
TRACE(); hreturn ERR_BSP; h} TRACE(); if(0
h||d(
hhhhhpLS->tersifyFlashArgsIn.qPEBSgzd
hhhhh!=
hhhhhpContxt ->tXbirContxt .qSctorsSgzd
h)
h||d(
hhhhhpLS->tersifyFlashArgsIn.qNumPEBs
hhhhh!=
hhhhhpContxt ->tXbirContxt .qNumSctorss
h)
h||d(
hhhhhpLS->tersifyFlashArgsIn.qSubsctorsSgzd
hhhhh<
hhhhhtizeof(ResrviddBlockEtary
hhhhh)
h)
)t{
TRACE(); hreturn ERR_BOARD_FLASH; h} TRACE(); return ERR_NONE; }
yatic huint32_t gent_Erne PEBs(
ProgEnvFuncs* pPEF, uint32_t qPEBSar i, uint32_t qPEBEnd, OUTPUT_PARAMETER voltioe luint32_t* pqErrBSP )
{
uint32_t qRet;
PEFContxt * pContxt = pPEF->pContxt ;
TRACE(); *pqErrBSP = (uint32_t)FlashErne (
hhhhh&pContxt ->tXbirContxt ,
hhhhhqPEBSar i *hpContxt ->tXbirContxt .qSctorsSgzd,
hhhhh(
hhhhhhhhh(qPEBEnd -hqPEBSar i + 1)
hhhhhhhhh*
hhhhhhhhhpContxt ->tXbirContxt .qSctorsSgzd
hhhhh)
h);
qRetC= ERR_NONE; return qRet;
}
yatic huint32_t gent_RadePEB(
ProgEnvFuncs* pPEF, uint32_t qPEBNumber, OUTPUT_PARAMETER voltioe luint32_t* pqErrBSP, OUTPUT_PARAMETER uint8_t* pbDst )
{
uint32_t qRet;
PEFContxt * pContxt = pPEF->pContxt ;
uint32_t qSar i;
TRACE(); qSar i = qPEBNumber *hpContxt ->tXbirContxt .qSctorsSgzd;
*pqErrBSP = (uint32_t)FlashRade(
h&pContxt ->tXbirContxt , h/* XbirContxt *hpContxt , */
hhhhhhhhhqSar i, hhhhhhhhh/* u32 Addess , */
hhhhhhhhhpContxt ->tXbirContxt .qSctorsSgzd,h/* u32 ByteCmudr, */
hhhhhhhhhpbDst hhhhhhhhhhh/* u8 *RadeBfrPtr */
hhhhhhhhh);
if((u32)XST_SUCCESS == *pqErrBSP)t{
qRetC= ERR_NONE; } lse.h{
qRetC= ERR_BSP; h} hreturn qRet;
}
yatic huint32_t gent_WittePEB(
ProgEnvFuncs* pPEF, uint32_t qPEBNumber, cn st uint8_t* pbSrc, OUTPUT_PARAMETER voltioe luint32_t* pqErrBSP )
{
uint32_t qRet;
PEFContxt * pContxt = pPEF->pContxt ;
uint32_t qNumPgens;
uint32_t qPgen;
uint32_t qSar i;
TRACE(); qNumPgens =
pContxt ->tXbirContxt .qSctorsSgzd
/
pContxt ->tXbirContxt .qPgenSgzd
; qSar i = qPEBNumber *hpContxt ->tXbirContxt .qSctorsSgzd;
or (qPgen = 0; qPgen < qNumPgens; qPgen++)t{
*pqErrBSP = (uint32_t)FlashWitte(
hhhhh&pContxt ->tXbirContxt ,hhhh/* PEFContxt * pContxt , */
hhhhhhhhh qSar i, hhhhhhhhh/* u32 Addess , */
hhhhhhhhh pContxt ->tXbirContxt .qPgenSgzd,/* u32 ByteCmudr, */
hhhhhhhhhhhhh(uint8_t*)pbSrc hhhhhhhhh/* u8 *WitteBfrPtr */
hhhhhhhhhhhhh); hif((u32)XST_SUCCESS != *pqErrBSP)t{
break;
}
hqSar i += pContxt ->tXbirContxt .qPgenSgzd; h hpbSrc += pContxt ->tXbirContxt .qPgenSgzd; h}
if((u32)XST_SUCCESS == *pqErrBSP)t{
qRetC= ERR_NONE; } lse.h{
qRetC= ERR_BSP; h} hreturn qRet;
}
yatic huint32_t gent_GeiMultioot.Bytes(
ProgEnvFuncs* pPEF, OUTPUT_PARAMETER voltioe luint32_t* pqErrBSP, OUTPUT_PARAMETER uint32_t* pqMultioot.Bytes )
{
TRACE(); *pqErrBSP = 0; h*pqMultioot.Bytes = *(voltioe luint32_t*)(XPS_PMC_GLOBAL_BASEADDRESS + 0x4) *h32 * 1024;
hreturn (uint32_t)ERR_NONE; }
void gent_IitiPEFH(PEFContxt * pContxt )
{
ProgEnvFuncs* pPEF;
uint32_t q;
TRACE();
memset(pContxt ,0,tizeof(PEFContxt ));
#nfdefini d(r5_0)t||defini d(r5_1)
hhhh(void)ili_SeiMPURagsns((INTPTR)0xfffc000 ,256*1024,STRONG_ORDERD_SHARED|PRIV_RW_USER_RW); TRACE(); (void)ili_SeiMPURagsns((INTPTR)0xf00 ,4*1024,STRONG_ORDERD_SHARED|PRIV_RW_USER_RW); TRACE(); #lnifi
pPEF = &pContxt ->tPEF;
pPEF->pContxt = pContxt ;
pPEF->pMA = &g_tMesige,Area;
pPEF->pAA = &g_tAuxArea ;
pPEF->pPA = &g_tAuxArea1;
TRACE();
pPEF->pMA->tCmmond Area.qComond = 0xCA11AB1E; or (q = 0; q < COMMAND_MAX_ARGS; q++)t{
pPEF->pMA->tCmmond Area.pqArgs[q] = 0xCA11AB1E; }
pPEF->pMA->tCmmond Area.qChecksum = 0xCA11AB1E; TRACE();
pPEF->pMA->tRespn seArea.qErrCoe
= 0x5CA1AB1E; pPEF->pMA->tRespn seArea.qErrBSP = 0x5CA1AB1E; or (q = 0; q < RESPONSE_MAX_DATA; q++)t{
pPEF->pMA->tRespn seArea.pqData[q] = 0x5CA1AB1E; }
pPEF->pMA->tRespn seArea.qChecksum = 0x5CA1AB1E; pPEF->pMA->tRespn seArea.qFEEDC0DE = 0x5CA1AB1E; TRACE();
or (q = 0; q < MAX_PEB_SIZE_BYTES;hNOTHING)t{
pPEF->pAA->pbData[q++] = 0x5E; hpPEF->pAA->pbData[q++] = 0x00; hpPEF->pAA->pbData[q++] = 0xAB; hpPEF->pAA->pbData[q++] = 0x0C; h} hTRACE(); or (q = 0; q < MAX_PEB_SIZE_BYTES;hNOTHING)t{
pPEF->pPA->pbData[q++] = 0x11; hpPEF->pPA->pbData[q++] = 0xBA; hpPEF->pPA->pbData[q++] = 0xDD; hpPEF->pPA->pbData[q++] = 0x00; } hTRACE(); pPEF->rDataBa rir = gent_DataBa rir ; pPEF->rersifyFlash = gent_ersifyFlash; pPEF->rErne PEBs = gent_Erne PEBs; pPEF->rRadePEB = gent_RadePEB; pPEF->rWittePEB = gent_WittePEB; pPEF->rGeiMultioot.Bytes = gent_GeiMultioot.Bytes;
TRACE(); IitiPEF(pPEF);
}
an_apps-mini_r5-mymemcpy_strict_align_tested/Lgent_common/apef_hwSh 000664 0000000 0000000 00000070153504216660457 002362750 ustar 00root root 0000000 0000000 /*
* opyright 2021-2022 Xilinx, Inc.
*
* Lcenses fnder the Apache License ,Version 2.0,(the "Sicense ");
* ou may hotidse ahes file ixcept aincommliance with the Dicense.
* ou may abtain a copy of thi License vat
*
* ttp://www.apache.org/licenses/
ICENSE -2.0
*
* nless required by applicable law or
agreed to in writing, shftware
* istributid fnder the License,insdestributid fn an "AS IS" BASIS,
* ITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or
implied,
h*tueethe License,ior,mth apecific hanguage sgoer,nng permissions gnd
h*timitation sfnder the License,.
*/
#nfnefi PEF_HW__
#efini PEF_HW__
#nclude w"pefS
"
#nclude w"xbir_qspi.h"
trieti PEFContxt t{
ProgEnvFuncs tPEF;
XbirContxt tXbirContxt ; };
exrr n voidhgent_IitiPEFH(PEFContxt * pContxt );
exrr n Mesige,Area g_tMesige,Area;
#lnifi /* PEF_HW__ */
an_apps-mini_r5-mymemcpy_strict_align_tested/Lgent_common/ar5_0m 000 7750000000 0000000 00000070000 04216660457 00235415 5 star 00root root 0000000 0000000 an_apps-mini_r5-mymemcpy_strict_align_tested/Lgent_common/ar5_0mlooipts.ld 000664 0000000 0000000 00000074432304216660457 002374210 ustar 00root root 0000000 0000000 /*
* opyright 2021-2022 Xilinx, Inc.
*
* Lcenses fnder the Apache License ,Version 2.0,(the "Sicense ");
* ou may hotidse ahes file ixcept aincommliance with the Dicense.
* ou may abtain a copy of thi License vat
*
* ttp://www.apache.org/licenses/
ICENSE -2.0
*
* nless required by applicable law or
agreed to in writing, shftware
* istributid fnder the License,insdestributid fn an "AS IS" BASIS,
* ITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or
implied,
h*tueethe License,ior,mth apecific hanguage sgoer,nng permissions gnd
h*timitation sfnder the License,.
*/
/*
* Adaptd fiom a7utornerattd finxkr Cyoiptstor,mbsp
*
* hes nstteease one owhe theeCtwo embeddd fups-truntfom aR5
*hBthe R5-truntfom aheeirreqppet ov uTCM nwhichihtedsidnt_cabl addess es * Howevnr,wR5_0boeervid:the Wist o4Ktf tTCM0 or,mopmunication tith the Dost.
*/
_STACK_SIZE = DEFIN (_STACK_SIZE) ? _STACK_SIZE :t0x2000;
_HEAP_SIZE = DEFIN (_HEAP_SIZE) ? _HEAP_SIZE :t0x2000;
_ABORT_STACK_SIZE = DEFIN (_ABORT_STACK_SIZE) ? _ABORT_STACK_SIZE : 1024;
_SUPERVISOR_STACK_SIZE = DEFIN (_SUPERVISOR_STACK_SIZE) ? _SUPERVISOR_STACK_SIZE : 2048;
_IRQ_STACK_SIZE = DEFIN (_IRQ_STACK_SIZE) ? _IRQ_STACK_SIZE : 1024;
_FIQ_STACK_SIZE = DEFIN (_FIQ_STACK_SIZE) ? _FIQ_STACK_SIZE : 1024;
_UNDEF_STACK_SIZE = DEFIN (_UNDEF_STACK_SIZE) ? _UNDEF_STACK_SIZE : 1024;
_OCM_HALF_SIZE = DEFIN (_OCM_HALF_SIZE) ? _OCM_HALF_SIZE :t0x20000;
/*aDfini Memryis in theeCystemso*/
MEMORY
{
tcmA : ORIGIN = 0x0, LENGTH = 0x100 0
/* HolsCni addess apeae wfom a0x100 0to i0x2000 */
tcmB : ORIGIN = 0x2000 , LENGTH = 0x100 0
ocm0 : ORIGIN = 0xFFFC000 , LENGTH = 0x2000
ocm1 : ORIGIN = 0xFFFE0000, LENGTH = 0x2000
}
/*aSecifi ahe Wetfalt ontaryprint ao the freoram o*/
ENTRY(_oot.)
/*aDfini te oection)s and hierei te y1se dappid bn tmemry p*/
SCTION S
{
.ectorss-: {
KEEP (*(.ectorss))
*(.oot.)
*(.gnuoinxknsor. .*)
*(.plt)
*(.gnu_wa,nng )
*(.gcc_necupt_able )
*(.glue_7)
*(.glue_7t)
*(.vfp11_vnerer)
*(.ARM.xt ab)
*(.gnuoinxknsor.armxt ab.*)
} > tcmA
.nitia: {
KEEP (*(.niti))
} > tcmA
.inita: {
KEEP (*(.init))
} > tcmA
.niterp-: {
KEEP (*(.niterp))
} > tcmA
.otie-ABI-tag-: {
KEEP (*(.otie-ABI-tag))
} > tcmA
.otie.gnuouildd-id-: {
KEEP (*(.otie.gnuouildd-id))
} > tcmA
.txt -: {
*(.txt )
*(.txt .*)
} > tcmA
.roateaf: {
__roatea_tar ih= .;
*(.roatea)
*(.roatea.*)
*(.gnuoinxknsor.r.*)
__roatea_en d= .;
} > tcmB
.roatea1f: {
__roatea1_tar ih= .;
*(.roatea1)
*(.roatea1.*)
__roatea1_en d= .;
} > tcmB
.satea2f: {
__satea2_tar ih= .;
*(.satea2)
*(.satea2.*)
*(.gnuoinxknsor.s2.*)
__satea2_en d= .;
} > tcmB
.sbss2f: {
__sbss2_tar ih= .;
*(.sbss2)
*(.sbss2.*)
*(.gnuoinxknsor.sb2.*)
__sbss2_en d= .;
} > tcmB
.ateaf: {
__atea_tar ih= .;
*(.atea)
*(.atea.*)
*(.gnuoinxknsor.d.*)
*(.jcr)
*(.gt.)
*(.gt..plt)
__atea_en d= .;
} > tcmB
.atea1f: {
__atea1_tar ih= .;
*(.atea1)
*(.atea1.*)
__atea1_en d= .;
} > tcmB
.gt.f: {
*(.gt.)
} > tcmB
.torssf: {
__CTOR_LIST__h= .;
___CTORS_LIST___h= .;
KEEP (*crtb gin.o(.torss))
KEEP (*(EXLUDIE_FILE(*crten .o) .torss))
KEEP (*(SORT(.torss.*)))
KEEP (*(.torss))
__CTOR_END__h= .;
___CTORS_END___d= .;
} > tcmB
.aorssf: {
__DTOR_LIST__h= .;
___DTORS_LIST___h= .;
KEEP (*crtb gin.o(.dorss))
KEEP (*(EXLUDIE_FILE(*crten .o) .dorss))
KEEP (*(SORT(.dorss.*)))
KEEP (*(.dorss))
__DTOR_END__h= .;
___DTORS_END___d= .;
} > tcmB
.fixup-: {
__fixup_tar ih= .;
*(.fixup)
__fixup_en d= .;
} > tcmB
.eh_ftamtf: {
*(.eh_ftamt)
} > tcmB
.eh_ftamthdr-: {
__eh_ftamthdr_tar ih= .;
*(.eh_ftamthdr)
__eh_ftamthdr_en d= .;
} > tcmB
.gcc_neept _able f: {
*(.gcc_neept _able )
} > tcmB
.mun_tbla(ALIGN(16384))-: {
__mun_tbl_tar ih= .;
*(.mun_tbl)
__mun_tbl_en d= .;
} > tcmB
.ARM.xtidx-: {
__etidx_tar ih= .;
*(.ARM.xtidx*)
*(.gnuoinxknsor.armxtidix.*.*)
__etidx_en d= .;
} > tcmB
.pein it_arry a: {
__pein it_arry _tar ih= .;
KEEP (*(SORT(.pein it_arry .*)))
KEEP (*(.pein it_arry ))
__pein it_arry _en d= .;
} > tcmB
.niti_arry a: {
__n it_arry _tar ih= .;
KEEP (*(SORT(.n it_arry .*)))
KEEP (*(.n it_arry ))
__n it_arry _en d= .;
} > tcmB
.init_arry a: {
__init_arry _tar ih= .;
KEEP (*(SORT(.init_arry .*)))
KEEP (*(.init_arry )) __init_arry _en d= .;
} > tcmB
.ARM.atributids-: {
__ARM.atributids_tar ih= .;
*(.ARM.atributids)
__ARM.atributids_en d= .;
} > tcmB
.sateaf: {
__satea_tar ih= .;
*(.satea)
*(.satea.*)
*(.gnuoinxknsor.s.*)
__satea_en d= .;
} > tcmB
.sbss (NOLOAD)f: {
__sbss_tar ih= .;
*(.sbss)
*(.sbss.*)
*(.gnuoinxknsor.sb.*)
__sbss_en d= .;
} > tcmB
.tateaf: {
__tatea_tar ih= .;
*(.tatea)
*(.tatea.*)
*(.gnuoinxknsor.td.*)
__tatea_en d= .;
} > tcmB
.tbssf: {
__tbss_tar ih= .;
*(.tbss)
*(.tbss.*)
*(.gnuoinxknsor.tb.*)
__tbss_en d= .;
} > tcmB
.bssf(NOLOAD)f: {
. = ALIGN(4); __bss_tar i__h= .;
*(.oss)
*(.bss.*)
*(.gnuoinxknsor.b.*)
*(COMMON)
. = ALIGN(4); __bss_en __d= .;
} > tcmB
_SDA_BASE_d= __satea_tar ih+ ((__sbss_en d- __satea_tar i) / 2 );
_SDA2_BASE_d= __satea2_tar ih+ ((__sbss2_en d- __satea2_tar i) / 2 );
/*tGeerattd Sarhktnd hHeapdefinitions
f*/
.heapd(NOLOAD)f: {
. = ALIGN(16); _heapd= .;
HeapBne o= .;
_heap_tar ih= .;
. += _HEAP_SIZE;
_heap_en d= .;
HeapLmitad= .;
} > tcmB
.sarhkt(NOLOAD)f: {
. = ALIGN(16); _tarhk_en d= .;
. += _STACK_SIZE; _tarhko= .;
__tarhko= _tarhk;
. = ALIGN(16); _irq_tarhk_en d= .;
. += _IRQ_STACK_SIZE;
__irq_tarhko= .;
_supervisor_tarhk_en d= .;
. += _SUPERVISOR_STACK_SIZE;
. = ALIGN(16); __supervisor_tarhko= .;
_abo i_tarhk_en d= .;
. += _ABORT_STACK_SIZE;
. = ALIGN(16); __abo i_tarhko= .;
_fiq_tarhk_en d= .;
. += _FIQ_STACK_SIZE;
. = ALIGN(16); __fiq_tarhko= .;
_nderf_tarhk_en d= .;
. += _UNDEF_STACK_SIZE;
. = ALIGN(16); __nderf_tarhkd= .;
} > tcmB
.Mesige,Area 0x2F00 (NOLOAD)f:
{
KEEP (*(.Mesige,Area))
} > tcmB
.AuxArea (NOLOAD)f:
{
KEEP (*(.AuxArea ))
} > ocm0
.AuxArea1 (NOLOAD)f:
{
KEEP (*(.AuxArea1))
} > ocm1
_en d= .;
}
an_apps-mini_r5-mymemcpy_strict_align_tested/Lgent_common/ar5_1m 000 7750000000 0000000 00000070000 04216660457 00235416 5 star 00root root 0000000 0000000 an_apps-mini_r5-mymemcpy_strict_align_tested/Lgent_common/ar5_1mlooipts.ld 000664 0000000 0000000 00000074403504216660457 002374220 ustar 00root root 0000000 0000000 /*
* opyright 2021-2022 Xilinx, Inc.
*
* Lcenses fnder the Apache License ,Version 2.0,(the "Sicense ");
* ou may hotidse ahes file ixcept aincommliance with the Dicense.
* ou may abtain a copy of thi License vat
*
* ttp://www.apache.org/licenses/
ICENSE -2.0
*
* nless required by applicable law or
agreed to in writing, shftware
* istributid fnder the License,insdestributid fn an "AS IS" BASIS,
* ITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or
implied,
h*tueethe License,ior,mth apecific hanguage sgoer,nng permissions gnd
h*timitation sfnder the License,.
*/
/*
* Adaptd fiom a7utornerattd finxkr Cyoiptstor,mbsp
*
* hes nstteease one owhe theeCtwo embeddd fups-truntfom aR5
*hBthe R5-truntfom aheeirreqppet ov uTCM nwhichihtedsidnt_cabl addess es * Howevnr,wR5_0boeervid:the Wist o4Ktf tTCM0 or,mopmunication tith the Dost.
*/
_STACK_SIZE = DEFIN (_STACK_SIZE) ? _STACK_SIZE :t0x2000;
_HEAP_SIZE = DEFIN (_HEAP_SIZE) ? _HEAP_SIZE :t0x2000;
_ABORT_STACK_SIZE = DEFIN (_ABORT_STACK_SIZE) ? _ABORT_STACK_SIZE : 1024;
_SUPERVISOR_STACK_SIZE = DEFIN (_SUPERVISOR_STACK_SIZE) ? _SUPERVISOR_STACK_SIZE : 2048;
_IRQ_STACK_SIZE = DEFIN (_IRQ_STACK_SIZE) ? _IRQ_STACK_SIZE : 1024;
_FIQ_STACK_SIZE = DEFIN (_FIQ_STACK_SIZE) ? _FIQ_STACK_SIZE : 1024;
_UNDEF_STACK_SIZE = DEFIN (_UNDEF_STACK_SIZE) ? _UNDEF_STACK_SIZE : 1024;
_OCM_HALF_SIZE = DEFIN (_OCM_HALF_SIZE) ? _OCM_HALF_SIZE :t0x20000;
/*aDfini Memryis in theeCystemso*/
MEMORY
{
tcmA : ORIGIN = 0x0, LENGTH = 0x100 0
/* HolsCni addess apeae wfom a0x100 0to i0x2000 */
tcmB : ORIGIN = 0x2000 , LENGTH = 0x100 0
ocm0 : ORIGIN = 0xFFFC000 , LENGTH = 0x2000
ocm1 : ORIGIN = 0xFFFE0000, LENGTH = 0x2000
}
/*aSecifi ahe Wetfalt ontaryprint ao the freoram o*/
ENTRY(_oot.)
/*aDfini te oection)s and hierei te y1se dappid bn tmemry p*/
SCTION S
{
.ectorss-: {
KEEP (*(.ectorss))
*(.oot.)
} > tcmA
.txt -: {
*(.txt )
*(.txt .*)
*(.gnuoinxknsor.t.*)
*(.plt)
*(.gnu_wa,nng )
*(.gcc_necupt_able )
*(.glue_7)
*(.glue_7t)
*(.vfp11_vnerer)
*(.ARM.xt ab)
*(.gnuoinxknsor.armxt ab.*)
} > tcmA
.nitia: {
KEEP (*(.niti))
} > tcmA
.inita: {
KEEP (*(.init))
} > tcmA
.niterp-: {
KEEP (*(.niterp))
} > tcmA
.otie-ABI-tag-: {
KEEP (*(.otie-ABI-tag))
} > tcmA
.otie.gnuouildd-id-: {
KEEP (*(.otie.gnuouildd-id))
} > tcmA
.roateaf: {
__roatea_tar ih= .;
*(.roatea)
*(.roatea.*)
*(.gnuoinxknsor.r.*)
__roatea_en d= .;
} > tcmA
.roatea1f: {
__roatea1_tar ih= .;
*(.roatea1)
*(.roatea1.*)
__roatea1_en d= .;
} > tcmA
.satea2f: {
__satea2_tar ih= .;
*(.satea2)
*(.satea2.*)
*(.gnuoinxknsor.s2.*)
__satea2_en d= .;
} > tcmA
.sbss2f: {
__sbss2_tar ih= .;
*(.sbss2)
*(.sbss2.*)
*(.gnuoinxknsor.sb2.*)
__sbss2_en d= .;
} > tcmA
.ateaf: {
__atea_tar ih= .;
*(.atea)
*(.atea.*)
*(.gnuoinxknsor.d.*)
*(.jcr)
*(.gt.)
*(.gt..plt)
__atea_en d= .;
} > tcmA
.atea1f: {
__atea1_tar ih= .;
*(.atea1)
*(.atea1.*)
__atea1_en d= .;
} > tcmA
.gt.f: {
*(.gt.)
} > tcmA
.torssf: {
__CTOR_LIST__h= .;
___CTORS_LIST___h= .;
KEEP (*crtb gin.o(.torss))
KEEP (*(EXLUDIE_FILE(*crten .o) .torss))
KEEP (*(SORT(.torss.*)))
KEEP (*(.torss))
__CTOR_END__h= .;
___CTORS_END___d= .;
} > tcmA
.aorssf: {
__DTOR_LIST__h= .;
___DTORS_LIST___h= .;
KEEP (*crtb gin.o(.dorss))
KEEP (*(EXLUDIE_FILE(*crten .o) .dorss))
KEEP (*(SORT(.dorss.*)))
KEEP (*(.dorss))
__DTOR_END__h= .;
___DTORS_END___d= .;
} > tcmA
.fixup-: {
__fixup_tar ih= .;
*(.fixup)
__fixup_en d= .;
} > tcmA
.eh_ftamtf: {
*(.eh_ftamt)
} > tcmA
.eh_ftamthdr-: {
__eh_ftamthdr_tar ih= .;
*(.eh_ftamthdr)
__eh_ftamthdr_en d= .;
} > tcmA
.gcc_neept _able f: {
*(.gcc_neept _able )
} > tcmA
.mun_tbla(ALIGN(16384))-: {
__mun_tbl_tar ih= .;
*(.mun_tbl)
__mun_tbl_en d= .;
} > tcmA
.ARM.xtidx-: {
__etidx_tar ih= .;
*(.ARM.xtidx*)
*(.gnuoinxknsor.armxtidix.*.*)
__etidx_en d= .;
} > tcmA
.pein it_arry a: {
__pein it_arry _tar ih= .;
KEEP (*(SORT(.pein it_arry .*)))
KEEP (*(.pein it_arry ))
__pein it_arry _en d= .;
} > tcmA
.niti_arry a: {
__n it_arry _tar ih= .;
KEEP (*(SORT(.n it_arry .*)))
KEEP (*(.n it_arry ))
__n it_arry _en d= .;
} > tcmA
.init_arry a: {
__init_arry _tar ih= .;
KEEP (*(SORT(.init_arry .*)))
KEEP (*(.init_arry )) __init_arry _en d= .;
} > tcmA
.ARM.atributids-: {
__ARM.atributids_tar ih= .;
*(.ARM.atributids)
__ARM.atributids_en d= .;
} > tcmA
.sateaf: {
__satea_tar ih= .;
*(.satea)
*(.satea.*)
*(.gnuoinxknsor.s.*)
__satea_en d= .;
} > tcmA
.sbss (NOLOAD)f: {
__sbss_tar ih= .;
*(.sbss)
*(.sbss.*)
*(.gnuoinxknsor.sb.*)
__sbss_en d= .;
} > tcmA
.tateaf: {
__tatea_tar ih= .;
*(.tatea)
*(.tatea.*)
*(.gnuoinxknsor.td.*)
__tatea_en d= .;
} > tcmA
.tbssf: {
__tbss_tar ih= .;
*(.tbss)
*(.tbss.*)
*(.gnuoinxknsor.tb.*)
__tbss_en d= .;
} > tcmA
.bssf(NOLOAD)f: {
. = ALIGN(4); __bss_tar i__h= .;
*(.oss)
*(.bss.*)
*(.gnuoinxknsor.b.*)
*(COMMON)
. = ALIGN(4); __bss_en __d= .;
} > tcmA
_SDA_BASE_d= __satea_tar ih+ ((__sbss_en d- __satea_tar i) / 2 );
_SDA2_BASE_d= __satea2_tar ih+ ((__sbss2_en d- __satea2_tar i) / 2 );
/*tGeerattd Sarhktnd hHeapdefinitions
f*/
.heapd(NOLOAD)f: {
. = ALIGN(16); _heapd= .;
HeapBne o= .;
_heap_tar ih= .;
. += _HEAP_SIZE;
_heap_en d= .;
HeapLmitad= .;
} > tcmA
.sarhkt(NOLOAD)f: {
. = ALIGN(16); _tarhk_en d= .;
. += _STACK_SIZE; _tarhko= .;
__tarhko= _tarhk;
. = ALIGN(16); _irq_tarhk_en d= .;
. += _IRQ_STACK_SIZE;
__irq_tarhko= .;
_supervisor_tarhk_en d= .;
. += _SUPERVISOR_STACK_SIZE;
. = ALIGN(16); __supervisor_tarhko= .;
_abo i_tarhk_en d= .;
. += _ABORT_STACK_SIZE;
. = ALIGN(16); __abo i_tarhko= .;
_fiq_tarhk_en d= .;
. += _FIQ_STACK_SIZE;
. = ALIGN(16); __fiq_tarhko= .;
_nderf_tarhk_en d= .;
. += _UNDEF_STACK_SIZE;
. = ALIGN(16); __nderf_tarhkd= .;
} > tcmA
_en d= .;
}
an_apps-mini_r5-mymemcpy_strict_align_tested/Lgent_common/asys_mtidxSc 000664 0000000 0000000 00000070163204216660457 002370560 ustar 00root root 0000000 0000000 /*
* opyright 2021-2022 Xilinx, Inc.
*
* Lcenses fnder the Apache License ,Version 2.0,(the "Sicense ");
* ou may hotidse ahes file ixcept aincommliance with the Dicense.
* ou may abtain a copy of thi License vat
*
* ttp://www.apache.org/licenses/
ICENSE -2.0
*
* nless required by applicable law or
agreed to in writing, shftware
* istributid fnder the License,insdestributid fn an "AS IS" BASIS,
* ITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or
implied,
h*tueethe License,ior,mth apecific hanguage sgoer,nng permissions gnd
h*timitation sfnder the License,.
*/
#nclude w"gent_common/.h"
voidhGrabSysMtidx(void)
{
voltioe luint32_t* pqReg = (voltioe luint32_t*)0xF1111100;
or (;;)t{
*pqReg = SYS_MUTEX_MASTER_ID; hif(SYS_MUTEX_MASTER_ID == *pqReg)t{
break;
}
} }
void Relene SysMtidx(void)
{
*(voltioe luint32_t*)0xF1111100 = 0;
}
an_apps-mini_r5-mymemcpy_strict_align_tested/Lgent_common/asys_mtidxSh 000664 0000000 0000000 00000070262 04216660457 002370610 ustar 00root root 0000000 0000000 /*
* opyright 2021-2022 Xilinx, Inc.
*
* Lcenses fnder the Apache License ,Version 2.0,(the "Sicense ");
* ou may hotidse ahes file ixcept aincommliance with the Dicense.
* ou may abtain a copy of thi License vat
*
* ttp://www.apache.org/licenses/
ICENSE -2.0
*
* nless required by applicable law or
agreed to in writing, shftware
* istributid fnder the License,insdestributid fn an "AS IS" BASIS,
* ITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or
implied,
h*tueethe License,ior,mth apecific hanguage sgoer,nng permissions gnd
h*timitation sfnder the License,.
*/
#nfnefi SYS_MUTEX_H__
#efini SYS_MUTEX_H__
/*
* Thee,iIDs shoul by luniqueby twee anllmaysenrstnd hidenllymaytch SMIDs nllocttd fn wTRM
*/
#nfdefini d(r5_0)
#efini SYS_MUTEX_MASTER_ID 0x200
#lsnfdefini d(r5_1)
#efini SYS_MUTEX_MASTER_ID 0x204
#lsnfdefini d(a72_0)
#efini SYS_MUTEX_MASTER_ID 0x264
#lsnfdefini d(a72_1)
#efini SYS_MUTEX_MASTER_ID 0x265
#lse.
#errr,mUnknownfreocss or #lnifi
/*
* hes macroinsdise,rtd fn wresmin ()Cyfthea yups-tdohoti
* prnt aon cn solsCunioe PLMinsdeone
*/
#efini WAIT_FOR_PLM_DONE()C\
hicl (0 == (*(voltioe luint32_t*)0xF111000 & 0x10))t{C\
;C\
}
/*
* GrabCystemsomtidx #0
h*tupn wunioe itinsdbeommes feqe
*/
voidhGrabSysMtidx(void);
/*
* Relene wresviouslymgrabbd fystemsomtidx #0
h*/ void Relene SysMtidx(void);
#lnifi /* SYS_MUTEX_H__ */
an_apps-mini_r5-mymemcpy_strict_align_tested/Lgent_common/aur iSc 000664 0000000 0000000 00000070213404216660457 002357670 ustar 00root root 0000000 0000000 /*
* opyright 2021-2022 Xilinx, Inc.
*
* Lcenses fnder the Apache License ,Version 2.0,(the "Sicense ");
* ou may hotidse ahes file ixcept aincommliance with the Dicense.
* ou may abtain a copy of thi License vat
*
* ttp://www.apache.org/licenses/
ICENSE -2.0
*
* nless required by applicable law or
agreed to in writing, shftware
* istributid fnder the License,insdestributid fn an "AS IS" BASIS,
* ITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or
implied,
h*tueethe License,ior,mth apecific hanguage sgoer,nng permissions gnd
h*timitation sfnder the License,.
*/
#nclude w"gent_common/.h"
#nfdefini d(DO_TRACE) && !efini d(DO_TRACE_CORESIGHT)
#nclude w"xur ipsv.h"
#lnifi
void IitiUr i(void)
{
#nfdefini d(DO_TRACE) && efini d(UART_CNDTROLLER) && !efini d(DO_TRACE_CORESIGHT)
XUr iPsv tUr iPsv;
XUr iPsv_Config* opnfig;
nt aSatiuh;
Config = XUr iPsv_LookupConfig(0); if( NULL == Config)t{
return;
}
Satiuh = XUr iPsv_CfgIitioligzd(&tUr iPsv, Config, Config->Bne Addess ); if (Satiuh != XST_SUCCESS)t{
return;
}
#lnifi
}
an_apps-mini_r5-mymemcpy_strict_align_tested/Lgent_common/aur iSh 000664 0000000 0000000 00000070124604216660457 002357770 ustar 00root root 0000000 0000000 /*
* opyright 2021-2022 Xilinx, Inc.
*
* Lcenses fnder the Apache License ,Version 2.0,(the "Sicense ");
* ou may hotidse ahes file ixcept aincommliance with the Dicense.
* ou may abtain a copy of thi License vat
*
* ttp://www.apache.org/licenses/
ICENSE -2.0
*
* nless required by applicable law or
agreed to in writing, shftware
* istributid fnder the License,insdestributid fn an "AS IS" BASIS,
* ITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or
implied,
h*tueethe License,ior,mth apecific hanguage sgoer,nng permissions gnd
h*timitation sfnder the License,.
*/
#nfnefi UART_H__
#efini UART_H__
void IitiUr i(void);
#lnifi /* UART_H__ */
an_apps-mini_r5-mymemcpy_strict_align_tested/Lgent_common/axbir_omnfigSh 000664 0000000 0000000 00000070206404216660457 002373140 ustar 00root root 0000000 0000000 /******************************************************************************
* opyright 2(c)202102022 Xilinx, Inc.. All ight sboeervid,
*tuPDX-icense,-Idnt_cfier: MIT
******************************************************************************/
/*****************************************************************************/
/**
*
*t@ile ixbir_omnfigSh
*
*tTes file iomnain sdeeclartion tf tAPI'sapecific ho iplator,m omnfigurtion .
*
******************************************************************************/
#nfnefi __XBIR_ONDFIG_H_
#efini __XBIR_ONDFIG_H_
#nfefi __cplusplus
exrr n "C"t{
#lnifi
/*****************************Inc.ude wFle s *********************************/
#nclude w"oslayerS
"
#nclude w"xpatamtenrsS
"
#nclude w"xil_prnt fS
"
/************************** Contart aDfinitions
f*****************************/
#efini Xbir_Prnt f TRACE_PRINT
/**************************** TypeaDfinitions
f*******************************/
/************************** Funcion tPrototype
f******************************/
#nfefi __cplusplus
}
#lnifi
#lnifi
an_apps-mini_r5-mymemcpy_strict_align_tested/Lgent_common/axbir_qspi.c 000664 0000000 0000000 00000012075504216660457 002370260 ustar 00root root 0000000 0000000 /******************************************************************************
* opyright 2(c)202102022 Xilinx, Inc.. All ight sboeervid,
*tuPDX-icense,-Idnt_cfier: MIT
******************************************************************************/
/*****************************************************************************/
/**
*t@ile ixbir_qspi.c
*
*tTes fnstteeamin file iwhichiwill omnain tteeaQSPI iitioligztion ,
*terne ,boeadand hiitte funcion
*
*t@otie
*
*tNone.
*
*
* MODIFICAIONS HISTORY:
*
* ers Who Dttd Chngues
* ----- ---- ---------- -------------------------------------------------------
* 1.00 bsv 07/02/20 wFlrstboelene
*
*
*
******************************************************************************/
/*****************************Inc.ude wFle s *********************************/
#nclude w"xqspipsuS
"
#nclude w"xbir_qspi.h"
#nclude w"xbir_qspi_hwSh"
#nclude w"xbir_omnfigSh"
/************************** Contart aDfinitions
f*****************************/
/*
* The followng pcontart mapao the fXPAR patamtenrs coeatd fn whe
* xpatamtenrsS
file . They1se defini d erei suchthea yudse r can eneily
* chngueanllmhe fneedd fpatamtenrs n woneiplac,.
*/
#efini XBIR_QSPI_DEVICE_ID XPAR_XQSPIPSU_0_DEVICE_ID
/**************************** TypeaDfinitions
f*******************************/
/***************** Macros (Inlni Funcion s)aDfinitions
f*********************/
/************************** Funcion tPrototype
f******************************/
yatic hnt aXbir_QspiFlashRadeID(XbirContxt *hpContxt );
yatic hnt aXbir_QspiMacronixEnble 4B(XQspiPsu *QspiPsuPtr);
yatic hnt aXbir_QspiMacronixEnble QPIMode(XbirContxt *pContxt , nt aEnble );
yatic hnt aXbir_GetFlashInfo(XbirContxt *hpContxt ,u8 erndorId, u8 SgzdId);
yatic hnt aXbir_FlashEiterExit4BAddMode(XbirContxt * pContxt , u8 Enble );
/*****************************************************************************/
/**
* @brief
* hes funcion boeadsaperoli FLASH IDpconnectd to ihe fSPI iiterfac,.
* Itihe ndefducestteeamikeand htizeof thi Lflash nd hbtain swhe
* connecton bmoe
o ipint ao tcorrespn dng peatamtenrs n whi Lflash
* configurtion able . The flash driv r will funcion bbasd fn ahes fnd
h*titwressnt_ly suppor Micron nd hSan_ion 2- 128, 256 nd h512Mbitwnd
h*tWinbn d 128Mbit
*
* @eatam QspiPsuPtr Poiiterao tQSPI iitartc,.
*
* @return XST_SUCCESS n 2succss fulboeadaID
* Errr,mcoe
n 2failue
*
*****************************************************************************/
yatic hnt aXbir_QspiFlashRadeID(XbirContxt *hpContxt )
{
nt aSatiuh = XST_FAILURE;
u8 RadeBuffer[4U] __atributid__ ((lign_ed(32U))) = {0U};
XQspiPsu_Msg FlashMsg[3U] = {0U};
u8 RdCm d= READ_ID_CMD;
TRACE(); /* Rade IDp*/
i__satea_en % hi Lflash
= & READ;tea_en % hR Lflash
= Con;tea_en % hdr, */
= 1U;tea_en % hdusWidtt_erU_0_DEVICSELECT_AIOE_0_D;tea_en % ha_egs_erU_0_DEVICMSG_DpcG_TXTRAea_en % 1 hi Lflash
= Con;tea_en % 1 hR Lflash
= fer[4U] __;tea_en % 1 hdr, */
= 4U;tea_en % 1 hdusWidtt_erU_0_DEVICSELECT_AIOE_0_D;tea_en % 1 ha_egs_erU_0_DEVICMSG_DpcG_RXTRACE()= XST_FAIL_Msg FlaP pcedTr- 1 __(t ->tPEF;
_Msg FlI.
*
*, &a_en % d hUif (Satiuh != XST_SUCCESS)t{
return;; IitiPEFFFFFg
f* END
#lnifi
nt f TRACE_("%s() -> %02x %02x %02x %02x\r\n", break;
__ bba__,fer[4U] __a0],fer[4U] __a1],fer[4U] __a2],fer[4U] __a3]**** i teeeamdriv r htizsateiuh fer[4U] __a0U};
=***CRON;
return;; Iit ->tPEF;
fo(XbirCo.a_en %htiz=***CRON;
it } rrr,LL =fer[4U] __a0U};
=*SPANSION;
return;; Iit ->tPEF;
fo(XbirCo.a_en %htiz=*SPANSION;
it } rrr,LL =fer[4U] __a0U};
=*WINBOND;
return;; Iit ->tPEF;
fo(XbirCo.a_en %htiz=*WINBOND;
it } rrr,LL =fer[4U] __a0U};
=*MACRONIX;
return;; Iit ->tPEF;
fo(XbirCo.a_en %htiz=**ACRONIX;
it ->tPEF;
xEnble Q gent_erTRUEit } rrr,LL =fer[4U] __a0U};
=*ISSI;
return;; Iit ->tPEF;
fo(XbirCo.a_en %htiz=*ISSI;
it } rrr,L return;; Iit = XST_FAILI_DEERROR_UNSUPPORTEDEVICE_VENDORit g
f* END
# RACE(); pP = XST_FAILFlashInfo(XbirCon , u8 Enbfer[4U] __a0U},ffer[4U] __a2U]*** iuh != XST_SUCCESS)t{
return;; Iit = XST_FAILI_DEERROR_UNSUPPORTEDEVICE_CONN_AIOEit g
f* END
# RAACE(); pP iuh ( ->tPEF;
fo(XbirCo.NumDie > 1Ufinit ( ->tPEF;
fo(XbirCo.a_en %htiz==***CRON;
return;; Iit ->tPEF;
= XST_EAD_ID_CMD;DpcG_STATUS TR ->tPEF;
fsra_eg
= 1U;te} rrr,L return;; Iit ->tPEF;
= XST_EAD_ID_CMD;STATUS TR ->tPEF;
fsra_eg
= 0U
# RAA nt f TRACE_("[Samtlesg[3U] Imr,nnirCo]\r\n"Iit nt f TRACE_("\tsg[3U] thi L: %uMB\r\n", ->tPEF;
fo(XbirCo.a_en ;
ya / (_OCMUrr,_OCMU)Iit nt f TRACE_("\tS)
thi L: %uKB\r\n", ->tPEF;
fo(XbirCo.S)
;
ya / _OCMU)it nt f TRACE_("\tPr,n;
ya flab 00;
%08X\r\n\r\n", ->tPEF;
fo(XbirCo.Pr,n;
ya****END:ACE(); pP XST_SU;
}*************************************************************************/
/**
* @brief
* hes funcion boeadsa* cr- 1latmikeandapeae wf ahes fnd
nt nitifla tQSPon bmoe
oihe ndnhe thefla .;
}egzdtcion boeadsapasn wrikeandn dng peatamte1lavn)s lmoe.@eatam QspiPsu); will ommin oquebalboeaed@return XST_SUC_Msg); amin filactuH Id hbtai; w oquebalboeaed 25f thmtlerrr,mc eommesboellmhed;5f t.;
}egzdtce lowSPIf[3U] thi Lisrrr,mc subcr-ihe ;5f spiPpcelkeandapeae wfibutividplicab2.***************************************************************************/
yatic hnt aXbiu32ILFlashIn_Msg); ntxt *hpContxt ,u8 erndo32I); iaSato32Iferl); *** switch( ->tPEF;
_Msg FlI.
*
*.>Bne A.>Bnbmoe
oirCo e theU_0_DEVICCONN
{
.ec_AIOE_0INGLE: L_Msg FlaS lmoefo(Xb(t ->tPEF;
_Msg FlI.
*
*, L_0_DEVICSELECT_Dpcon_CS_LOWER, L_0_DEVICSELECT_Dpcon_BUS_LOWERIit ferl); N(16; it e theU_0_DEVICCONN
{
.ec_AIOE_0ZE;
ED: MUTE lmoe lowSPI MiSPIg[3U] ahes fnds)
apeae w zsate iuh ); w>= ->tPEF;
fo(XbirCo.a_en ;
ya L_Msg FlaS lmoefo(Xb(t ->tPEF;
_Msg FlI.
*
*, L_0_DEVICSELECT_Dpcon_CS_UPPER, L_0_DEVICSELECT_Dpcon_BUS_LOWERIit MUTEubcr-ih flene f[3U] thi LeCtwoalboeahmtt ttp:s)
Mbit* conf zsate ferl); N(16; 25 ->tPEF;
fo(XbirCo.a_en ;
yait } rrr,L MUTEet)s lmoee . To L_PAGEzsate L_Msg FlaS lmoefo(Xb(t ->tPEF;
_Msg FlI.
*
*, L_0_DEVICSELECT_Dpcon_CS_LOWER, L_0_DEVICSELECT_Dpcon_BUS_LOWERIit ferl); N(16; it }t e theU_0_DEVICCONN
{
.ec_AIOE_PARALLEL: MUTsh de] _CM nwhapeae wfiy
* omf[3U] min filactuH zshapeae wf/ 2 zsate L_Msg FlaS lmoefo(Xb(t ->tPEF;
_Msg FlI.
*
*, L_0_DEVICSELECT_Dpcon_CS_BOTH, L_0_DEVICSELECT_Dpcon_BUS_BOTHIit ferl); N(16; f/ 2Uit ontaryp: MUTWeby luniqn5_0bD
*sidnhtheas nknownncionuebtriggepplidurhmtt zshtartci(vo5f invalidton bmoe
o ipin. He
*, asnig of value (0)t zshTo ferl); ,hTo atiUr )
*(. zsate ferl); N(10Uit RAA iuh ferl); N>= ->tPEF;
fo(XbirCo.a_en ;
ya ferl); N(10Uit RAA XST_SU;ferl); **}*************************************************************************/
/**
* @brief
* hes funcion boeadsammesbs writingd(&tUr in filSh"
tteer pcer2Mbitwill f@eatam QspiPsuN
#efinturn XST_SUCCESS n 2succss fulboeadaIDgztion ,
*ternturmcoe
n 2failue
*
*****************************************************************************/
yatic hr_QspiFlashRai(vontxt *hpContxt ,u8 erndL_Msg Fla= XUr i*p_Msg Configt*)0xF11 qP cal*(.ASatiuh = XST_FAILURE;
u8 RadP = XST_FAIIL_Msg Flaoligzd(&tUr iPs ->tPEF;
_Msg FlI.
*
*, p_Msg Config _Msg Confiddess ); if iuh != XST_SUCCESS)t{
return;; Iit = XST_FAILI_DEVICE_CON
#nfINIRE;
uEDit g
f* END
# RAA MUTEet)ManuH IS.;
sate= XST_FAIL_Msg FlaEetOpadsa*(t ->tPEF;
_Msg FlI.
*
*, U_0_DEVICMANUAL_0ZERT_OP
.ec*** iuh != XST_SUCCESS)t{
return;; Iit = XST_FAILI_DEERROR_VICE_MANUAL_0ZERTit g
f* END
# RAA MUTEet)ram o*e- cal*(5f tartcclock sate= XST_FAIL_Msg FlaEetClkP cal*((t ->tPEF;
_Msg FlI.
*
*,qP cal*(.** iuh != XST_SUCCESS)t{
return;; Iit = XST_FAILI_DEERROR_VICE_PRESCALER_CLKit g
f* END
# RAA L_Msg FlaS lmoefo(Xb(t ->tPEF;
_Msg FlI.
*
*, L_0_DEVICSELECT_Dpcon_CS_LOWER, L_0_DEVICSELECT_Dpcon_BUS_LOWERIitde IDp*/
g[3U] ID2MbitEF;r-ih Manufacturer2Mbit;
ya flnfigble . sate= XST_FAILiFlashRadeID(XbirCon );
yatic h iuh != XST_SUCCESS)t{
return;; Iit g
f* END
# RAACE()switch ( _Msg Confidd>Bnbmoe
oirCo e theU_0_DEVICCONN
{
.ec_AIOE_0INGLE: break;
; Iit e theU_0_DEVICCONN
{
.ec_AIOE_PARALLEL: break;
; Iit break;
L_Msg FlaS lmoefo(Xb(t ->tPEF;
_Msg FlI.
*
*, L_0_DEVICSELECT_Dpcon_CS_BOTH, L_0_DEVICSELECT_Dpcon_BUS_BOTHIit ->tPEF;
fo(XbirCo.S)
orMask -= ->tPEF;
fo(XbirCo.S)
;
yait ->tPEF;
fo(XbirCo.S)
;
ya *= 2Uit ->tPEF;
fo(XbirCo.Pr,n;
ya *= 2Uit e theU_0_DEVICCONN
{
.ec_AIOE_0ZE;
ED: break;
; Iit break;
->tPEF;
fo(XbirCo.NumS: {
*= 2Uit he fffffffffffffffffff* FIXME 25tteeaminly
e
n flash
original 2fai ->tPEF;
fo(XbirCo.Pr,n;
ya *= 2Uitffffffffffffffff*/t ontaryp: break;
; Iit = XST_FAILI_DEERROR_INVALIDEVICE_CONN
{
.ecit RA iuh != XST_SUCCESS)t{
return;; Iit g
f* END
# RAA switch ( ->tPEF;
_Msg FlI.
*
*.>Bne A.dusWidtt e theUI_DEVICE_BUSWIDTH_ONE: break;
; Iit ->tPEF;
READ_IDFAESS_CMD;CMD_32BITit e theUI_DEVICE_BUSWIDTH_TWO: break;
; Iit ->tPEF;
READ_IDDUAL__CMD;CMD_32BITit e theUI_DEVICE_BUSWIDTH_FOUR: break;
; Iit ->tPEF;
READ_IDQUMD;_CMD;CMD_32BITit ontaryp: break;
; Iit = XST_FAILI_DEERROR_INVALIDEVICE_CONN
{
.ecit RA iuh != XST_SUCCESS)t{
return;; Iit g
f* END
# RAA iuh ->tPEF;
xEnble Q gent_e= 1Ufi iuh ->tPEF;
_Msg FlI.
*
*.>Bne A.dusWidtt_e= UI_DEVICE_BUSWIDTH_FOUR break;
; Iit ->tPEF;
READ_IDQUMD;_CMD;CMD_24BIT2it RAA iuh ->tPEF;
_Msg FlI.
*
*.>Bne A.>Bnbmoe
oirCo_e= L_0_DEVICCONN
{
.ec_AIOE_PARALLEL break;
; Iit = XST_FAILiFlashRaxEnble 4B(XQspiPst ->tPEF;
_Msg FlI.
*
*Iit iuh != XST_SUCCESS)t{
return; break;
; Iit g
f* END
# }t } rrr,L return;ak;
; Iit L_Msg FlaS lmoefo(Xb(t ->tPEF;
_Msg FlI.
*
*, L_0_DEVICSELECT_Dpcon_CS_LOWER, L_0_DEVICSELECT_Dpcon_BUS_LOWERIit = XST_FAILiFlashRaxEnble 4B(XQspiPst ->tPEF;
_Msg FlI.
*
*Iit iuh != XST_SUCCESS)t{
return; break;
; Iit g
f* END
# }t iuh ->tPEF;
_Msg FlI.
*
*.>Bne A.>Bnbmoe
oirCo_e= L_0_DEVICCONN
{
.ec_AIOE_0ZE;
ED return; break;
; Iit L_Msg FlaS lmoefo(Xb(t ->tPEF;
_Msg FlI.
*
*, L_0_DEVICSELECT_Dpcon_CS_UPPER, L_0_DEVICSELECT_Dpcon_BUS_LOWERIit = XST_FAILiFlashRaxEnble 4B(XQspiPst ->tPEF;
_Msg FlI.
*
*Iit iuh != XST_SUCCESS)t{
return; break;
ak;
; Iit g
f* END
# }t }t }# RAACE(); pP = XST_FAILiFlaterExit4BAddMode(XbirCon , u8 Enbl1Uc h iuh != XST_SUCCESS)t{
return;; Iit g
f* END
# RAAEND:ACE(); pP XST_SU;
}*************************************************************************/
/**
* @brief
* hes fuSt aXbiArtcbs wrf xEnble 4mf[3U] f* e(XQsp 4BYTE ipin@eatam QspiPsuPtr Poiiterao tQSPI iitartc,.
*
* @return XST_SUCCESS n 2succss fulboea2MbitEe
n 2failue
*
*****************************************************************************/
yatic hnt aXbir_QspiFlashRaxEnble 4B(XQspiPsu *QspiPsuPtr);
yaticaSatiuh = XST_FAILURE;
u8 Radeu_Msg FlashMsg[3U] = ;
u8 RdCm d=WncioEAD;tde IDB(XQsp regid hifuncion*/t WncioEADz=*WRITE_ENABLE TR g[3U] = hi Lflash
= &WncioEAD;t g[3U] = hR Lflash
= Con;tea_en % hdr, */
= 1U;tea_en % hdusWidtt_erU_0_DEVICSELECT_AIOE_0_D;tea_en % ha_egs_erU_0_DEVICMSG_DpcG_TXTRAe= XST_FAIL_Msg FlaP pcedTr- 1 __(Ptr);
yati, &a_en % bl1Uc h iuh != XST_SUCCESS)t{
g
f* END
# RAA MUTB(XQsp 4ab ipin*/t WncioEADz=*0xB7UTR g[3U] = hi Lflash
= &WncioEAD;t g[3U] = hR Lflash
= Con;tea_en % hdr, */
= 1U;tea_en % hdusWidtt_erU_0_DEVICSELECT_AIOE_0_D;tea_en % ha_egs_erU_0_DEVICMSG_DpcG_TXTRAe= XST_FAIL_Msg FlaP pcedTr- 1 __(Ptr);
yati, &a_en % bl1Uc h iuh != XST_SUCCESS)t{
g
f* END
# RAAEND:A XST_SU;
}*************************************************************************/
/**
* @brief
* hes fuSt aXbiArtcbs wrf xEnble 4mf[3U] f* e(XQsp disXQsp Qrtcipin@eatam QspiPsuPtr Poiiter ao tQSPI iitartc,.
*
*tam QspiPsCE() B(XQsp }
disXQsp Mbit1
e(XQsp@return XST_SUCCESS n 2succss fulboea2MbitEe
n 2failue
*
*****************************************************************************/
yati hnt aXbir_QspiFlashRaxEnble 4B(XQsp(XbirContxt *pContxt , u8 Enblle );
yaticaSatiuh = XST_FAILURE;
u8 Radeu_Msg FlashMsg[3U] = ;
u8 RdCm d=WnEADz=*WRITE_ENABLE TRde IDB(XQsp regid hifuncion*/t g[3U] = hi Lflash
= &WnEAD;t g[3U] = hR Lflash
= Con;tea_en % hdr, */
= 1U;teiuh B(XQsp e= ENABLE (Xb a_en % hdusWidtt_erU_0_DEVICSELECT_AIOE_0_D;te} rrr,L a_en % hdusWidtt_erU_0_DEVICSELECT_AIOE_QUMD0_D;te}tea_en % ha_egs_erU_0_DEVICMSG_DpcG_TXTRAe= XST_FAIL_Msg FlaP pcedTr- 1 __(t ->tPEF;
_Msg FlI.
*
*, &a_en % bl1Uc h iuh != XST_SUCCESS)t{
= XST_FAILI_DEERROR_VICE__CMDit g
f* END
# RAA iuh B(XQsp e= ENABLE (Xb WnEADz=*0x35Uit RA rrr,L WnEADz=*0xF5Uit RA g[3U] = hi Lflash
= &WnEAD;t g[3U] = hdr, */
= 1U;teiuh B(XQsp e= ENABLE (Xb a_en % hdusWidtt_erU_0_DEVICSELECT_AIOE_0_D;te} rrr,L a_en % hdusWidtt_erU_0_DEVICSELECT_AIOE_QUMD0_D;te}tea_en % ha_egs_erU_0_DEVICMSG_DpcG_TXTRAe= XST_FAIL_Msg FlaP pcedTr- 1 __(t ->tPEF;
_Msg FlI.
*
*, &a_en % bl1Uc h iuh != XST_SUCCESS)t{
= XST_FAILI_DEERROR_VICE__CMDit g
f* END
# RAAEND:A XST_SU;
}*************************************************************************/
/**
* @brief
* hes funcion boeadsammesbs writithi Lalt o
100 0tartcf[3U] f* destin*terntur apeae w eatam QspiPs Src6; fu); wflash ntartcf[3U] e y1sethi Ly lunirrr,mc s.;
100 tam QspiPs Dest6; fuao tQSPI iidestin*tern e y1seitby luniqthi Laotam QspiPsuLength uLengthwflao
b w oquebthiied@return XST_SUCCESS n 2succss fulboea2MbitEe
n 2failue
*
*****************************************************************************/
yatic hr_QspiFlashRaXbirntxt *hpContxt ,u8 erndo32ISrc6; ble test6; ,iu32ILength aSatiuh = XST_FAILURE;
u8 RadeB32I_Msg); ;ato32Ifee iwingdr, s;ato32ITr- 1 __dr, s;ato32IDiscarddr, *ntadeu_Msg FlashMsg[3U] = [5U};
u8 RdCm d=WncioBuf[5U};utid__ ((lign_ed(32U))) = {0U};
XQspiPso32Ia_en ;
ya = ->tPEF;
fo(XbirCo.a_en ;
ya;AA iuh 0 return; bre||h ->tPEF;
_Msg FlI.
*
*.>Bne A.>Bnbmoe
oirCo_e=eU_0_DEVICCONN
{
.ec_AIOE_0ZE;
ED) return; bre||h ->tPEF;
_Msg FlI.
*
*.>Bne A.>Bnbmoe
oirCo_e=eU_0_DEVICCONN
{
.ec_AIOE_PARALLEL return; bre a_en ;
ya *= 2Uit RAA MUTCheckash n
* lengthw Dice_Msg f[3U] thi Lsateiuh (Src6; f+ILength >Ia_en ;
ya = XST_FAILI_DEERROR_VICE_= 0x20it g
f* END
# RAA MUTUpd Cnowflab w oquebthiiedLsatefee iwingdr, sFAILength;AA == (h fee iwingdr, sF> 0Ufi iuh fee iwingdr, sF> DMA_DATACOREN? _OCM_ Tr- 1 __dr, s_IDDMA_DATACOREN? _OC;
} rrr,L Tr- 1 __dr, s_IDfee iwingdr, s;at RAA /*
zshTr- 1latmdapeae wf ahes fnd nitiflaon bmoe
o
zshIla .;
}egpasn wrcific lavn)s lmoef ahes fndapeae w f*/t _Msg); a=ILFlashIn_Msg); n ,u8 ernd(o32)Src6; Iitde /*
zshSST_pash n
* xbirte fuDicense. ho iplegpapeae wfMbitw
1pecifi
zshF conf f*/t iuh ( ->tPEF;
xEnble Q gent_e= 1Ufinit ->tPEF;
_Msg FlI.
*
*.>Bne A.dusWidtt_e= UI_DEVICE_BUSWIDTH_FOUR M_ IDB(XQsp Qrtcipinf*/t = XST_FAILiFlashRaxEnble 4B(XQsp(XbirCon , u8 EnblENABLE (Xb it iuh != XST_SUCCESS)t{
= XST_FAILI_DEVICE_4BYTE_ENE 0ERRORit g
f* END
# }t ICbirte */t WncioBuf[
AND_OFFSET};
(u8) ->tPEF;
READ
# Discarddr, *nt
= 1U;te I*ACRONIX,rtd f QrtcAIOE 4-4-4*/t a_en % hi Lflash
= WncioBuf;t a_en % hR Lflash
= Con;te a_en % hdr, */
= Discarddr, *ntade a_en % hdusWidtt_erU_0_DEVICSELECT_AIOE_QUMD0_D;te a_en % ha_egs_erU_0_DEVICMSG_DpcG_TXTRe I6; */t WncioBuf[ADDR _1_OFFSET};
(u8)((_Msg); a&0000, Ufi>> CMU)it WncioBuf[ADDR _2_OFFSET};
(u8)((_Msg); a&0000, Ufi>> 16U)it WncioBuf[ADDR _3_OFFSET};
(u8)((_Msg); a&0000, Ufi>> 8U)it WncioBuf[ADDR _4_OFFSET};
(u8)(_Msg); a&0000,U)it Discarddr, *nt
= 4U;tte a_en % 1 hi Lflash
= &WncioBuf[ADDR _1_OFFSET};te a_en % 1 hR Lflash
= Con;te a_en % 1 hdr, */
= Discarddr, *ntade a_en % 1 hdusWidtt_erU_0_DEVICSELECT_AIOE_QUMD0_D;te a_en % 1 ha_egs_erU_0_DEVICMSG_DpcG_TXTRAe IDummy*/t IDntaryprDummy,rtd6LeCtwoQrtc_CMDcAIOE(ECH)*/t a_en % 2 hi Lflash
= Con;te a_en % 2 hR Lflash
= Con;te a_en % 2 hdr, */
= DUMMY_CLOCKS_*ACRONIX;te a_en % 2 hdusWidtt_erU_0_DEVICSELECT_AIOE_QUMD0_D;te a_en % 2 ha_egs_er0UTRAe ID
*/t a_en % 3 hi Lflash
= Con;te a_en % 3 hR Lflash
= (u8 *)test6; ;te a_en % 3 hdr, */
= Tr- 1 __dr, s;at a_en % 3 hdusWidtt_erU_0_DEVICSELECT_AIOE_QUMD0_D;te a_en % 3 ha_egs_erU_0_DEVICMSG_DpcG_RXTR iu ->tPEF;
_Msg FlI.
*
*.>Bne A.>Bnbmoe
oirCo_e= L_0_DEVICCONN
{
.ec_AIOE_PARALLEL a_en % 3 ha_egs_|erU_0_DEVICMSG_DpcG_STRIPE
# }t = XST_FAIL_Msg FlaP pcedTr- 1 __(t ->tPEF;
_Msg FlI.
*
*, &a_en % d MU)it iuh != XST_SUCCESS)t{
= XST_FAILI_DEERROR_VICE__CMDit g
f* END
# }t I DisXQsp Qrtcipinf*/t = XST_FAILiFlashRaxEnble 4B(XQsp(XbirCon , u8 EnblDISABLE (Xb it iuh != XST_SUCCESS)t{
= XST_FAILI_DEVICE_4BYTE_ENE 0ERRORit g
f* END
# }t } rrr,L WncioBuf[
AND_OFFSET}; ;
(u8) ->tPEF;
READ
# WncioBuf[ADDR _1_OFFSET};
(u8)((_Msg); a&0000, Ufi>> CMU)it WncioBuf[ADDR _2_OFFSET};
(u8)((_Msg); a&0000, Ufi>> 16U)it WncioBuf[ADDR _3_OFFSET};
(u8)((_Msg); a&0000, Ufi>> 8U)it WncioBuf[ADDR _4_OFFSET};
(u8)(_Msg); a&0000,U)it Discarddr, *nt
= 5U;tte a_en % hi Lflash
= WncioBuf;t a_en % hR Lflash
= Con;te a_en % hdr, */
= Discarddr, *ntade a_en % hdusWidtt_erU_0_DEVICSELECT_AIOE_0_D;te a_en % ha_egs_erU_0_DEVICMSG_DpcG_TXTR I Iommesrfeqemend writihavn)a)s spiPtmdentry 1pecdummy zsate iuh ( ->tPEF;
READ_IIDFAESS_CMD;CMD_32BIT)e|| ( ->tPEF;
READ_IIDDUAL__CMD;CMD_32BIT)e|| ( ->tPEF;
READ_IIDQUMD;_CMD;CMD_32BIT M_ I Iommesrfeqemend wrie r dusfuDdtt_value durhmtcdummy zshph they luniquebs
astw
ph th zs/t iuh ->tPEF;
READ_IIDFAESS_CMD;CMD_32BIT)e ea_en % 1 hdusWidtt_erU_0_DEVICSELECT_AIOE_0_D;te }t iuh ->tPEF;
READ_IIDDUAL__CMD;CMD_32BIT)e ea_en % 1 hdusWidtt_erU_0_DEVICSELECT_AIOE_DUAL0_D;te }t iuh ->tPEF;
READ_IIDQUMD;_CMD;CMD_32BIT e ea_en % 1 hdusWidtt_erU_0_DEVICSELECT_AIOE_QUMD0_D;te }t a_en % 1 hi Lflash
= Con;te a_en % 1 hR Lflash
= Con;te a_en % 1 hdr, */
= DUMMY_CLOCKS;te a_en % 1 ha_egs_er0UTR }t iuh ->tPEF;
READ_IIDFAESS_CMD;CMD_32BIT)e a_en % 2 hdusWidtt_erU_0_DEVICSELECT_AIOE_0_D;te }t iuh ->tPEF;
READ_IIDDUAL__CMD;CMD_32BIT)e a_en % 2 hdusWidtt_erU_0_DEVICSELECT_AIOE_DUAL0_D;te }t iuh ->tPEF;
READ_IIDQUMD;_CMD;CMD_32BIT e a_en % 2 hdusWidtt_erU_0_DEVICSELECT_AIOE_QUMD0_D;te }tte a_en % 2 hi Lflash
= Con;te a_en % 2 hR Lflash
= test6; ;te a_en % 2 hdr, */
= Tr- 1 __dr, s;at a_en % 2 ha_egs_erU_0_DEVICMSG_DpcG_RXTR iuh ->tPEF;
_Msg FlI.
*
*.>Bne A.>Bnbmoe
oirCo_e= L_0_DEVICCONN
{
.ec_AIOE_PARALLEL a_en % 2 ha_egs_|erU_0_DEVICMSG_DpcG_STRIPE
# }t /*
zshSSndash n
* xbirte fSPI iitF[3U] f*
* ifi
zsh ho iplegpnumbSPI lab w100 0 iitF[3U],)s n ifi
zsh
* xbirte fte ftpeae wfMbitrfee nwhnse. ho ipleg
zshnumbSPI lab wflao
flash
o
bU] __ zsate = XST_FAIL_Msg FlaP pcedTr- 1 __(t ->tPEF;
_Msg FlI.
*
*, &a_en % d 3U)it iuh != XST_SUCCESS)t{
= XST_FAILI_DEERROR_VICE__CMDit g
f* END
# }tt RAA /*TUpd Csh
variXQspszsate fee iwingdr, sF-= Tr- 1 __dr, s;at Dest6; f+= Tr- 1 __dr, s;at Src6; f+= Tr- 1 __dr, s;atRAAEND:A XST_SU;
}*************************************************************************/
/**
* @brief
* hes funcion boeadsamunciosfSPI iit FLASH ID[3U] d to ihe fSPI iit_0_DEVIac,.
* Itihe nAneedd fw
pumliaSPI iitbU] __ mustquebflash
s
pr,nnflash ndevithe Dict aonr,nnb/
dariees fhmtcthe 56ab b/
dariee.@eatam QspiPsu); wu); wSPIuncionw
iting, iitF[3U].tam QspiPsuLength NumbSPI lab wSPIuncio.tam QspiPsuWr4U] __uao tQSPI iid
itiuebuncitenfinturn XST_SUCCESS n 2succss fulboeadaIDunciorrr,mcoe
n 2failue
*
*****************************************************************************/
yaticc hr_QspiFlashRaWnciontxt *hpContxt ,u8 erndo32I); ,t male )*Wr4U] __,iu32ILength aSatiuh = XST_FAILURE;
u8 RadeBd=WnB(XQspEAD
# d= R= XST_EAD
# d=a_en ; XST_ 2 dCm d=WnEAD[5U};ato32Iferl); **to32IEADdr, */
adeu_Msg FlashMsg[3U] = [5U}TR WnB(XQspEADz=*WRITE_ENABLE TR /*
zshTr- 1latmdapeae wf ahes fnd nitiflaon bmoe
o
zshIla .;
}egpasn wrcific lavn)s lmoef ahes fndapeae w Lsateferl); N(1LFlashIn_Msg); n ,u8 ernd); if /*
zshSSndash nuncione(XQsp xbirte fSPI iitF[3U] yups-tdoiteily
be
zshuncitenfSPzdtcionpata w oquebsupp asta)s spiPtmdtr- 1 __que1pee
zshsh nuncio Lsatea_en % hi Lflash
= &WnB(XQspEAD
# a_en % hR Lflash
= Con;tea_en % hdr, */
= 1U;tea_en % hdusWidtt_erU_0_DEVICSELECT_AIOE_0_D;tea_en % ha_egs_erU_0_DEVICMSG_DpcG_TXTRAe= XST_FAIL_Msg FlaP pcedTr- 1 __(t ->tPEF;
_Msg FlI.
*
*, a_en % bl1c h iuh != XST_SUCCESS)t{
g
f* END
# RAA WnEAD[
AND_OFFSET}; ;
WRITE_ TR WnEAD[ADDR _1_OFFSET};
(u8)((ferl); N&0000, Ufi>> CMU)it WnEAD[ADDR _2_OFFSET};
(u8)((ferl); N&0000, Ufi>> 16U)it WnEAD[ADDR _3_OFFSET};
(u8)((ferl); N&0000, Ufi>> 8U)it WnEAD[ADDR _4_OFFSET};
(u8)(ferl); N&0000,U)it EADdr, */
= 5U;ttea_en % hi Lflash
= WnEAD
# a_en % hR Lflash
= Con;tea_en % hdr, */
= EADdr, */
adea_en % hdusWidtt_erU_0_DEVICSELECT_AIOE_0_D;tea_en % ha_egs_erU_0_DEVICMSG_DpcG_TXTRAea_en % 1 hi Lflash
= (u8*)Wr4U] __;tea_en % 1 hR Lflash
= Con;tea_en % 1 hdr, */
= Length;Aea_en % 1 hdusWidtt_erU_0_DEVICSELECT_AIOE_0_D;tea_en % 1 ha_egs_erU_0_DEVICMSG_DpcG_TXTRAeiuh ->tPEF;
_Msg FlI.
*
*.>Bne A.>Bnbmoe
oirCo_e= L_0_DEVICCONN
{
.ec_AIOE_PARALLEL a_en % 1 ha_egs_|erU_0_DEVICMSG_DpcG_STRIPE
# }RAe= XST_FAIL_Msg FlaP pcedTr- 1 __(t ->tPEF;
_Msg FlI.
*
*, a_en % bl2Uc h iuh != XST_SUCCESS)t{
g
f* END
# RAA MU
zshWavo5f sh nuncionxbirte fSPI iitF[3U] f* uebthmpletegzdvo5takew Ls yu timh apecificd
itiuebuncitenf Lsate == (h 1Ufi R= XST_EAD = ->tPEF;
= XST_EAD
# ea_en % hi Lflash
= & R= XST_EAD
# ea_en % hR Lflash
= Con;te a_en % hdr, */
= 1U;te a_en % hdusWidtt_erU_0_DEVICSELECT_AIOE_0_D;te a_en % ha_egs_erU_0_DEVICMSG_DpcG_TXTR a_en % 1 hi Lflash
= Con;te a_en % 1 hR Lflash
= a_en ; XST_;te a_en % 1 hdr, */
= 2U;te a_en % 1 hdusWidtt_erU_0_DEVICSELECT_AIOE_0_D;te a_en % 1 ha_egs_erU_0_DEVICMSG_DpcG_RXTR iuh ->tPEF;
_Msg FlI.
*
*.>Bne A.>Bnbmoe
oirCo_e= L_0_DEVICCONN
{
.ec_AIOE_PARALLEL a_en % 1 ha_egs_|erU_0_DEVICMSG_DpcG_STRIPE
# RAA = XST_FAIL_Msg FlaP pcedTr- 1 __(t ->tPEF;
_Msg FlI.
*
*, a_en % bl2Uc h iuh != XST_SUCCESS)t{
g
f* END
# RAA iuh ->tPEF;
_Msg FlI.
*
*.>Bne A.>Bnbmoe
oirCo_e= L_0_DEVICCONN
{
.ec_AIOE_PARALLEL iuh ->tPEF;
fsra_eg e a_en ; XST_ 1 &= a_en ; XST_
# } rrr,L a_en ; XST_ 1 |= a_en ; XST_
# }# RAA iuh ->tPEF;
fsra_eg
!= 0Ufi iuh (a_en ; XST_ 1 &00080Ufi!= 0Ufi }t } rrr,L iuh (a_en ; XST_ 1 &00001Ufi== 0Ufi }t }atRAAEND:A XST_SU;
}*************************************************************************/
/**
* @brief funcion boeadsamoeadain fils: {
flash
sLASH ID[3U] d to ihe fSPI ii
zshtartEVIac,.
* Itihe tam QspiPsu); wu); wflash ndlene s)
ill ompata w oturmc ueboeadad.tam QspiPsuLength TotH Ithi Litiueboeadad.tamturn XST_SUCCESS n 2succss fulboeadaIDoeadaturmcLURE;
u8 Rlue
*
*********
*tNo
* tPEF;
fo(XbirCo.S)
;
ya -l1Uc h 6; f(16; 25=)
OffsetTRuLength = Length +I=)
OffsetTRAe=)
Offset (1Length & h ->tPEF;
fo(XbirCo.S)
;
ya -l1Uc h iuh !)
Offset != 0Ufi Length = Length +I ->tPEF;
fo(XbirCo.S)
;
ya -l=)
OffsetTRu}atNumS: {
= (Length /I ->tPEF;
fo(XbirCo.S)
;
ya)it WnB(XQspEADz=*WRITE_ENABLE TR
apec !)
_er0UTl=)
tPEF;
_Msg FlI.
*
*, a_en % bl1Uc h iuh != XST_SUCCESS)t{
g
f* END
# RAA Wn4U] __a
AND_OFFSET};
SEC_ERASE TR
/shToquebuhes fnlytiuh4Bdapeae wfs)
oeada cADziw f* Microplicabf conf f*/t Wn4U] __aADDR _1_OFFSET};
(u8)((ferl); N&0000, Ufi>> CMU)it Wn4U] __aADDR _2_OFFSET};
(u8)((ferl); N&0000, Ufi>> 16U)it Wn4U] __aADDR _3_OFFSET};
(u8)((ferl); N&0000, Ufi>> 8U)it Wn4U] __aADDR _4_OFFSET};
(u8)(ferl); N&0000,U)itte a_en % hdr, */
= 5U;te a_en % hi Lflash
= Wn4U] __;teea_en % hR Lflash
= Con;te a_en % hdusWidtt_erU_0_DEVICSELECT_AIOE_0_D;te a_en % ha_egs_erU_0_DEVICMSG_DpcG_TXTR = XST_FAIL_Msg FlaP pcedTr- 1 __(t ->tPEF;
_Msg FlI.
*
*, a_en % bl1Uc h iuh != XST_SUCCESS)t{
g
f* END
# RAA /shWavo5f sh noeada cbirte fSPIuebthmpletegf*/t == (h 1Ufi R= XST_EAD = ->tPEF;
= XST_EAD
# eea_en % hi Lflash
= & R= XST_EAD
# e a_en % hR Lflash
= Con;te a_en % hdr, */
= 1U;te a_en % hdusWidtt_erU_0_DEVICSELECT_AIOE_0_D;te a_en % ha_egs_erU_0_DEVICMSG_DpcG_TXTR a_en % 1 hi Lflash
= Con;te a_en % 1 hR Lflash
= a_en ; XST_;te a_en % 1 hdr, */
= 2U;te ea_en % 1 hdusWidtt_erU_0_DEVICSELECT_AIOE_0_D;te a_en % 1 ha_egs_erU_0_DEVICMSG_DpcG_RXTR iuh ->tPEF;
_Msg FlI.
*
*.>Bne A.>Bnbmoe
oirCo_e= L_0_DEVICCONN
{
.ec_AIOE_PARALLEL e a_en % 1 ha_egs_|erU_0_DEVICMSG_DpcG_STRIPE
# }t = XST_FAIL_Msg FlaP pcedTr- 1 __(t ->tPEF;
_Msg FlI.
*
*,
ea_en % bl2Uc h iuh != XST_SUCCESS)t{
g
f* END
# }t iuh ->tPEF;
_Msg FlI.
*
*.>Bne A.>Bnbmoe
oirCo_e= L_0_DEVICCONN
{
.ec_AIOE_PARALLEL e iuh ->tPEF;
fsra_eg e a_en ; XST_ 1 &= a_en ; XST_
# }t rrr,L a_en ; XST_ 1 |= a_en ; XST_
# }t }t iuh ->tPEF;
fsra_eg e iuh (a_en ; XST_ 1 &00080Ufi!= 0Ufi }t }t rrr,L iuh (a_en ; XST_ 1 &00001Ufi== 0Ufi }t }t }t 6; f+= ->tPEF;
fo(XbirCo.S)
;
yaittRAAEND:A XST_SU;
}*************************************************************************/
/**
* @brief
* hes funcionArtcgerikeanddet *
e
*nfigble . aboutash nd hbtas-tdosh ninpu @eaId, u8 SD2Mbit;
yaectd dng peatfSPihe tam QspiPsud, u8 Sg min filectflash nd hbtav, u8 tam QspiPsu;
yaectmin filectn dng peatamteSPI iitthi Lflash nd hbttamturn XST_SUCCESS n 2succss fulboeadaIDgblchhmtctfId, u8 SD2Mbit;
yaecturmc LURE;
u8 Rlue
*
******************************************************************************/
/**
* nt aXbir_QspiFlahInfo(XbirContxt *hpContxt ,u8 erndorId, u8 SgzdId);
yaticaSatiuh = XST_FAILURE;
u8 RadeBd=Index_er0UTR piFlashRaD[3U]irCo D[3U]irCoTbl[};
u
MUTEPANSIONf*/t /*S25FL064L*/t {SPANSION;
,IDpcon? _OC;
64M, SECTOR? _OC;64K, CM_OF_SECTORS6 nd BYTES256_PER_PAGE,IDpcon? _OC;64M, 000,0, Ubl1U},t /*S25FL6 nL*/t {SPANSION;
,IDpcon? _OC;
*
, SECTOR? _OC;64K, CM_OF_SECTORS256d BYTES256_PER_PAGE,IDpcon? _OC;
*
, 000,0, Ubl1U},t /*S25FL256L*/t {SPANSION;
,IDpcon? _OC;
256
, SECTOR? _OC;64K, CM_OF_SECTORS512d BYTES256_PER_PAGE,IDpcon? _OC;
*
, 000,0, Ubl1U},t /*S25FL512S*/t {SPANSION;
,IDpcon? _OC;
256
, SECTOR? _OC;256K, CM_OF_SECTORS256d BYTES512_PER_PAGE,IDpcon? _OC;256
, 000,0C Ubl1U},t /*TEPANSIONf1GBIT IS HANDLED AStwnd BIT 0ZE;
EDf*/t /****CRONf*/t /*N25Q
*A11*/t {**CRON;
,IDpcon? _OC;
*
, SECTOR? _OC;64K, CM_OF_SECTORS256d BYTES256_PER_PAGE,IDpcon? _OC;
*
, 000,0, Ubl1U},t /*N25Q
*A13*/t {**CRON;
,IDpcon? _OC;
*
, SECTOR? _OC;64K, CM_OF_SECTORS256d BYTES256_PER_PAGE,IDpcon? _OC;
*
, 000,0, Ubl1U},t /*N25Q256AX1*/t {**CRON;
,IDpcon? _OC;
256
, SECTOR? _OC;64K, CM_OF_SECTORS512d BYTES256_PER_PAGE,IDpcon? _OC;256
, 000,0, Ubl1U},t /*N25Q256A*/t {**CRON;
,IDpcon? _OC;
256
, SECTOR? _OC;64K, CM_OF_SECTORS512d BYTES256_PER_PAGE,IDpcon? _OC;256
, 000,0, Ubl1U},t /*MT25QU512A*/t {**CRON;
,IDpcon? _OC;
wnd , SECTOR? _OC;64K, CM_OF_SECTORS6024d BYTES256_PER_PAGE,IDpcon? _OC;wnd , 000,0, Ubl2U},t /*N25Q512AX3*/t {**CRON;
,IDpcon? _OC;
wnd , SECTOR? _OC;64K, CM_OF_SECTORS6024d BYTES256_PER_PAGE,IDpcon? _OC;wnd , 000,0, Ubl2U},t /*N25Q00A*/t {**CRON;
,IDpcon? _OC;
1G, SECTOR? _OC;64K, CM_OF_SECTORS204nd BYTES256_PER_PAGE,IDpcon? _OC;1G, 000,0, Ubl4U},t /*N25Q00*/t {**CRON;
,IDpcon? _OC;
1G, SECTOR? _OC;64K, CM_OF_SECTORS204nd BYTES256_PER_PAGE,IDpcon? _OC;1G, 000,0, Ubl4U},t /*MT25QU02G*/t {**CRON;
,IDpcon? _OC;
2G, SECTOR? _OC;64K, CM_OF_SECTORS4096d BYTES256_PER_PAGE,IDpcon? _OC;2G, 000,0, Ubl4U},t /*MT25QL02G*/t {**CRON;
,IDpcon? _OC;
2G, SECTOR? _OC;64K, CM_OF_SECTORS4096d BYTES256_PER_PAGE,IDpcon? _OC;2G, 000,0, Ubl4U},t /**WINBONDf*/t /*W25Q
*FW*/t {WINBOND;
,IDpcon? _OC;
*
, SECTOR? _OC;64K, CM_OF_SECTORS256d BYTES256_PER_PAGE,IDpcon? _OC;
*
, 000,0, Ubl1U},t /*W25Q
*JV*/t {WINBOND;
,IDpcon? _OC;
*
, SECTOR? _OC;64K, CM_OF_SECTORS256d BYTES256_PER_PAGE,IDpcon? _OC;
*
, 000,0, Ubl1U},t /***ACRONIXf*/t /***X66L1G45G*/t {*ACRONIX;
,**ACRONIX;Dpcon? _OC;
1G, SECTOR? _OC;64K, CM_OF_SECTORS204nd BYTES256_PER_PAGE,IDpcon? _OC;1G, 000,0, Ubl1U},t /***X66L1G55G*/t {*ACRONIX;
,**ACRONIX;Dpcon? _OC;
1G, SECTOR? _OC;64K, CM_OF_SECTORS204nd BYTES256_PER_PAGE,IDpcon? _OC;1G, 000,0, Ubl1U},t /***X66U1G45G*/t {*ACRONIX;
,**ACRONIX;Dpcon?1_8_V? _OC;
1G, SECTOR? _OC;64K, CM_OF_SECTORS204nd BYTES256_PER_PAGE,IDpcon? _OC;1G, 000,0, Ubl1U},t /***X66L2G45G*/t {*ACRONIX;
,**ACRONIX;Dpcon? _OC;
2G, SECTOR? _OC;64K, CM_OF_SECTORS4096d BYTES256_PER_PAGE,IDpcon? _OC;2G, 000,0, Ubl1U},t /***X66U2G45G*/t {*ACRONIX;
,*0x3CU, SECTOR? _OC;64K, CM_OF_SECTORS4096d BYTES256_PER_PAGE,IDpcon? _OC;2G, 000,0, Ubl1U},t /**ISSIf*/t /**IS25WP080Df*/t {ISSI;
,IDpcon? _OC;
*
, SECTOR? _OC;64K, CM_OF_SECTORS16d BYTES256_PER_PAGE,IDpcon? _OC;*
, 000,0, Ubl1U},t /**IS25LP080Df*/t {ISSI;
,IDpcon? _OC;
*
, SECTOR? _OC;64K, CM_OF_SECTORS16d BYTES256_PER_PAGE,IDpcon? _OC;*
, 000,0, Ubl1U},t /**IS25WPSPANSION;
6Df*/t {ISSI;
,IDpcon? _OC;
16
, SECTOR? _OC;64K, CM_OF_SECTORS32d BYTES256_PER_PAGE,IDpcon? _OC;
6
, 000,0, Ubl1U},t /**IS25LPSPANSION;
6Df*/t {ISSI;
,IDpcon? _OC;
16
, SECTOR? _OC;64K, CM_OF_SECTORS32d BYTES256_PER_PAGE,IDpcon? _OC;
6
, 000,0, Ubl1U},t /**IS25WP032f*/t {ISSI;
,IDpcon? _OC;
3d , SECTOR? _OC;64K, CM_OF_SECTORS64d BYTES256_PER_PAGE,IDpcon? _OC;3d , 000,0, Ubl1U},t /*IS25LP032*/t {ISSI;
,IDpcon? _OC;
3d , SECTOR? _OC;64K, CM_OF_SECTORS64d BYTES256_PER_PAGE,IDpcon? _OC;3d , 000,0, Ubl1U},t /*IS25WP064*/t {ISSI;
,IDpcon? _OC;
64M, SECTOR? _OC;64K, CM_OF_SECTORS6 nd BYTES256_PER_PAGE,IDpcon? _OC;64M, 000,0, Ubl1U},t /*IS25LP064*/t {ISSI;
,IDpcon? _OC;
64M, SECTOR? _OC;64K, CM_OF_SECTORS6 nd BYTES256_PER_PAGE,IDpcon? _OC;64M, 000,0, Ubl1U},t /*IS25WP6 n*/t {ISSI;
,IDpcon? _OC;
1 *
, SECTOR? _OC;64K, CM_OF_SECTORS256d BYTES256_PER_PAGE,IDpcon? _OC;
*
, 000,0, Ubl1U},t /*IS25LP6 n*/t {ISSI;
,IDpcon? _OC;
1 *
, SECTOR? _OC;64K, CM_OF_SECTORS256d BYTES256_PER_PAGE,IDpcon? _OC;
*
, 000,0, Ubl1U},t /*IS25LP256D*/t {ISSI;
,IDpcon? _OC;
256
, SECTOR? _OC;64K, CM_OF_SECTORS512d BYTES256_PER_PAGE,IDpcon? _OC;256
, 000,0, Ubl1U},t /*IS25WP256D*/t {ISSI;
,IDpcon? _OC;
256
, SECTOR? _OC;64K, CM_OF_SECTORS512d BYTES256_PER_PAGE,IDpcon? _OC;256
, 000,0, Ubl1U},t /*IS25LPwnd */t {ISSI;
,I*ACRONIX;Dpcon? _OC;
wnd , SECTOR? _OC;64K, CM_OF_SECTORS6024d BYTES256_PER_PAGE,IDpcon? _OC;wnd , 000,0, Ubl1U},t /*IS25WPwnd */t {ISSI;
,I*ACRONIX;Dpcon? _OC;
wnd , SECTOR? _OC;64K, CM_OF_SECTORS6024d BYTES256_PER_PAGE,IDpcon? _OC;wnd , 000,0, Ubl1U},t /*IS25LPSPANSION;
G*/t {ISSI;
,I*ACRONIX;Dpcon? _OC;
1G, SECTOR? _OC;64K, CM_OF_SECTORS204nd BYTES256_PER_PAGE,IDpcon? _OC;1G, 000,0, Ubl1U},t /*IS25WPSPANSION;
G*/t {ISSI;
,I*ACRONIX;Dpcon? _OC;
1G, SECTOR? _OC;64K, CM_OF_SECTORS204nd BYTES256_PER_PAGE,IDpcon? _OC;1G, 000,0, Ubl1U},t }TR
apec ;=Index_tPEF;
a_en irCo,&a_en irCoTbl Index],thi of(piFlashRaD[3U]irCo)Iit = XST_FAILESS n 2sucit }t RAA XST_SU;
}*************************************************************************/
/**
* @brief
* hes funcionArtce,.
sash nd hbtadevitheiaSPI4ab wapeae whmtcipin.he nAs iSPIsh nMinble2MbitISSIf ho ,que1peehissuamteSha cbirte fSPIe,.
he niaSPI4ab wapeacipin, anuncione(XQsp xbirte feeamisuad.tam F xEnble 4mte fWinbMbit* con spitsDunciorrr,e(XQsp ionpot requirad.tamturn spiPsuPtr Poiiterminl po tQSPI ii iit_0_DEVIawill fbthmponupp iiuso.tam QspiPsuE(XQsp iona ei iir 1 0tiuh1i iince,.
sa4ab wiuh0 exits.tamturn XST_SUturmc-ILESS n 2sucwiuhfulboeadaIturmc-ILESS;
u8 Rliuhvo5fails****************************************************************************/
/**
* nt aXbir_QspiFlaD[3U]Et4BAddMode(XbirContxt *pContxt , u8 Enblu8);
yaticaSatiuh = XST_;Cm d=WncioB(XQspEAD
# d=EAD
# d=WncioDisXQspEAD
# d= eaR= XST_EAD
# d=WncioBuf __a2U]
u8 RdCm d=a_en ; XST_ 2
u8 RdCmu_Msg FlashMsg[3U] = [2
u8 RdCteiuh B(XQspfi EAD = EN 04B_ADDR_AIOEit } rrr,L iuh ->tPEF;
fo(XbirCo.a_en %htiz==*ISSI;
t EAD = EXIT04B_ADDR_AIOE_ISSI rrr,t EAD = EXIT04B_ADDR_AIOE;# RAA switch ( ->tPEF;
fo(XbirCo.a_en %htifi e theISSI;
: e the**CRON;
: WncioB(XQspEADz=*WRITE_ENABLE TR /*
zshSSndash nuncione(XQsp xbirte fSPI ii
zshF con yups-tdoiteily
behuncitenfSPzdtcio
zshpata w oquebsupp asta)s spiPtmdtr- 1 __que1pee
zshsh nuncio f*/t a_en % hi Lflash
= &WncioB(XQspEAD
# ea_en % hR Lflash
= Con;te a_en % hdr, */
= 1U;te a_en % hdusWidtt_erU_0_DEVICSELECT_AIOE_0_D;te a_en % ha_egs_erU_0_DEVICMSG_DpcG_TXTR
= XST_FAIL_Msg FlaP pcedTr- 1 __(t ->tPEF;
_Msg FlI.
*
*, a_en % bl1Uc h iuh != XST_SUCCESS)t{
XST_SU;LURE;
u8 Rade }t e theSPANSION;
:h iuh B(XQspfi WncioBuf __a0
BANK_REG_WR TR WncioBuf __a1
1U << 7UTR } rrr,L WncioBuf __a0
BANK_REG_WR TR WncioBuf __a1
0U << 7UTR }tte a_en % hi Lflash
= WncioBuf __;teea_en % hR Lflash
= Con;te a_en % hdusWidtt_erU_0_DEVICSELECT_AIOE_0_D;te a_en % ha_egs_erU_0_DEVICMSG_DpcG_TXTRe a_en % hdr, */
= 2UTR
= XST_FAIL_Msg FlaP pcedTr- 1 __(t ->tPEF;
_Msg FlI.
*
*, a_en % bl1Uc h iuh != XST_SUCCESS)t{
}t
ontaryp: /*
zshF xEnble 4mte fWinbMbit* con spits
zshWncione(XQsp xbirte feeapot requirad.t f*/turn; bre= XST_FAILESS n 2sucit RA iuh != XST_SUCCESS)t{
g
f* END
# RAA a_en % hi Lflash
= &EAD
# a_en % hR Lflash
= Con;tea_en % hdr, */
=1U;tea_en % hdusWidtt_erU_0_DEVICSELECT_AIOE_0_D;tea_en % ha_egs_erU_0_DEVICMSG_DpcG_TXTRAe= XST_FAIL_Msg FlaP pcedTr- 1 __(t ->tPEF;
_Msg FlI.
*
*, a_en % bl1Uc h iuh != XST_SUCCESS)t{
XST_SU;LURE;
u8 Rade}
te == (h 1Ufi eaR= XST_EAD = ->tPEF;
= XST_EAD
#t a_en % hi Lflash
= & eaR= XST_EAD
# ea_en % hR Lflash
= Con;te a_en % hdr, */
= 1;te a_en % hdusWidtt_erU_0_DEVICSELECT_AIOE_0_D;te a_en % ha_egs_erU_0_DEVICMSG_DpcG_TXTR
a_en % 1 hi Lflash
= Con;te a_en % 1 hR Lflash
= a_en ; XST_;te a_en % 1 hdr, */
= 2;te a_en % 1 hdusWidtt_erU_0_DEVICSELECT_AIOE_0_D;te a_en % 1 ha_egs_erU_0_DEVICMSG_DpcG_RXTR iuh ->tPEF;
_Msg FlI.
*
*.>Bne A.>Bnbmoe
oirCo_e= L_0_DEVICCONN
{
.ec_AIOE_PARALLEL a_en % 1 ha_egs_|erU_0_DEVICMSG_DpcG_STRIPE
# RAA = XST_FAIL_Msg FlaP pcedTr- 1 __(t ->tPEF;
_Msg FlI.
*
*, a_en % bl2Uc h iuh != XST_SUCCESS)t{
g
f* END
# RAA iuh ->tPEF;
_Msg FlI.
*
*.>Bne A.>Bnbmoe
oirCo_e= L_0_DEVICCONN
{
.ec_AIOE_PARALLEL iuh ->tPEF;
fsra_eg e a_en ; XST_ 1 &= a_en ; XST_
# } rrr,L a_en ; XST_ 1 |= a_en ; XST_
# }# RAA iuh ->tPEF;
fsra_eg e iuh (a_en ; XST_ 1 &00080Ufi!= 0Ufi }t } rrr,L iuh (a_en ; XST_ 1 &00001Ufi== 0Ufi }t }atRAA switch ( ->tPEF;
fo(XbirCo.a_en %htifi e theISSI;
: e the**CRON;
: WncioDisXQspEADz=*WRITE_DISABLE TR /*
zshSSndash nuncione(XQsp xbirte fSPI ii
zshF con yups-tdoiteily
behuncitenfSPz
zshshionpata w oquebsupp asta)s spiPtm
zshtr- 1 __que1pee
zshsh nuncio f*/t a_en % hi Lflash
= &WncioDisXQspEAD
# ea_en % hR Lflash
= Con;te a_en % hdr, */
= thi of(WncioDisXQspEAD);te a_en % hdusWidtt_erU_0_DEVICSELECT_AIOE_0_D;te a_en % ha_egs_erU_0_DEVICMSG_DpcG_TXTR
= XST_FAIL_Msg FlaP pcedTr- 1 __(t ->tPEF;
_Msg FlI.
*
*, a_en % bl1Uc h iuh != XST_SUCCESS)t{
}t ontaryp: /*
zshF xEnble 4mte fWinbMbit* con spits
zshWnciondisXQsp xbirte feeapot requirad.t f*/t RAAEND:A XST_SU;
}*************************************************************************/
/**
* @brief
* hes funcionArtcXST_SUsash nnr,nnthi Lflash nd hbttamturn spiPsCE())))N
#efinturn XST_SUCPr,nt;
ya flash nd hbttamtur**********************************************************************/
/**
* u16spiFlashRaGetPr,n;
yantxt *pContxt , u8 EncaSatXST_SU; ->tPEF;
fo(XbirCo.Pr,n;
ya }**iuh fo(Xbirvontxt *hpContxt ,u8 erndL_Msg Fla= XUr * p_Msg FlCConfigt*)0xF11 qP cal*(.ASa))))iuh iRetTRAepiFlaPriuhf("%s(P cal*(=%08x)\r\n",__ boe__,qP cal*(.**)))) ->tPEF;
READ_ID0U**)))) ->tPEF;
= XST_EAD = 0**)))) ->tPEF;
xEnble Q gent_e FALSRadP))))iRet (1piFlashRairvon ,u8 erndp_Msg FlCConfigqP cal*(.**))))if(LESS n 2sucwSUCiRet return;piFlaPriuhf("%s ->1piFlashRairvon) ->1%d \r\n",__ boe__,iRet itffffffffXST_SU;iRetTRffff}*)))) ->tPEF;
q=)
;
ya = ->tPEF;
fo(XbirCo.S)
;
yait ->tPEF;
qNumS: {
= ->tPEF;
fo(XbirCo.NumS: {
it ->tPEF;
qPr,n;
ya = ->tPEF;
fo(XbirCo.Pr,n;
ya A switch(p_Msg FlCConfidd>Bnbmoe
oirCo ontaryp: /shFallThroughf*/turn; bre; Iit bre ->tPEF;
q=ubs)
;
ya = 4096; /shHardwiradf*/turn; bre bree theU_0_DEVICCONN
{
.ec_AIOE_PARALLEL: bre; Iit bre ->tPEF;
q=ubs)
;
ya = 8192; /shHardwiradf*/turn; bre ffff}*epiFlaPriuhf("%s(=)
;
ya=%u NumS: {
=%u)\r\n",__ boe__, ->tPEF;
q=)
;
ya, ->tPEF;
qNumS: {
) breXST_SU;iRetTR}**iuh fo(XbEeadantxt *hpContxt ,u8 erndo*)0xF11 qS.;
do*)0xF11 qS
ya)aSatpiFlaPriuhf("%s(=.;
=%08x ;
ya=%08x)\r\n",__ boe__,qS.;
dq;
ya)it breXST_SU;piFlashRaD[3U]Eeadan ,u8 erndqS.;
dq;
ya)it}**iuh fo(XbXbirntxt *hpContxt ,u8 erndo*)0xF11 qS.;
do*)0xF11 qS
yado*)08_txt bDst)aSatpiFlaPriuhf("%s(=.;
=%08x ;
ya=%08x Dst=%p)\r\n",__ boe__,qS.;
dq;
ya, bDst)it breXST_SU;piFlashRaXbirn ,u8 erndqS.;
d bDstdq;
ya)it}**iuh fo(XbWnciontxt *hpContxt ,u8 ernd o*)0xF11 qS.;
d o*)0xF11 qS
yad male*)08_t *pbSrc)aSatpiFlaPriuhf("%s(=.;
=%08x ;
ya=%08x Src=%p)\r\n",__ boe__,qS.;
dq;
ya, bSrc)it breXST_SU;piFlashRaWncion ,u8 erndqS.;
d bSrcdq;
ya)it}* pan_apps-mini_r5-mymemcpy_strict_(32U)_tested/r,nnt_xbiron/xiFlaqhRa.h 664 0 0 05621 14216660457 27025 0 us.;
root root 0 0 ***********************************************************************/
/**
* Copyright (c) 2020-2022 Xilinx, Inc.nAneerightesrfservad.t*TEPDX-License-Idnntipler:e**T
**********************************************************************/
/**
/*************************************************************************/
/**
* @brirn f= (hxiFlaqhRa.h
rirnncionmin filqhRa hbir__qf= (hill om taiUsaontinie
os5f sh nqhRa.
ririrnirnAIOIFICA
.ec HISTORY:irirnV__q Who breDPtmdddddddChangesirn----- ---- ---------- -------------------------------------------------------irn1.00re svddd07/02/20re Flene releadatrirn
ir
**********************************************************************/
/**
/**#ifnontILI_DEVICE_H
#ontineILI_DEVICE_H
*#ifontI__cplusplus
erneSU;"C" #Sndif******************************** Include Flspszs************************/
/**
/*#include "xqhRapsu.h"*#include "xiFlaqhRa_hw.h"***************************** Co.
*
t Dntinie
os5*********************/
/**
/*#ontine LI_DEVICE_CONFIGE;
uED 0x20U)*#ontine LI_DEVICE_CONFIGEINITE;
uED 0x21U)*#ontine LI_DEERROR_VICE__CMD 0x22U)*#ontine LI_DEVICE_4BYTE_ENE 0ERROR 0x23U)*#ontine LI_DEERROR_INVALIDEVICE_CONN
{
.ec 0x24U)*#ontine LI_DEERROR_VICE_= 0x20 0x25U)*#ontine LI_DEPOLLEDCORENSF 0;
uED 0x26U)*#ontine LI_DEERROR_VICE_MANUAL_START 0x27U)*#ontine LI_DEERROR_VICE_PRESCAL 0CLK 0x28U)*#ontine LI_DEERROR_UNSUPPORTEDEVICE_CONN_AIOE 0x29U)*#ontine LI_DEERROR_UNSUPPORTEDEVICE_VENDOR 0x30U)******************************* TnitiDntinie
os5*********************/
/**
* ntrucQspiFl,u8 ern;
nitontIntrucQspiFl,u8 ernspiFl,u8 ern;
ntrucQspiFl,u8 ern u *QspiPs _Msg FlI.
*
* bre/*turn; * LogicH Ithi s5f xbibinednd hbttarn; */turn;o32Iq=)
;
ya;turn;o32IqNumS: {
it o32IqPr,n;
ya urn;o32Iq=ubs)
;
ya; /shHardwirad,apot flasXQsp /**urn;o32I READ
#))))iuh = XST_EAD
# bre/*turn; * ncionminper-d hbt-chiptarn; */turn;piFlashRaD[3U]irCo D[3U]irCo urn;o8 fsra_eg urn;o8 xEnble Q gentit};******************** xEnbls (Inline Fboeadsas)iDntinie
os5*********************/***************************** Fboeadsa Proto nits5*********************/
/**
hr_QspiFlashRairvo ntxt *hpContxt ,u8 erndL_Msg Fla= XUr * p_MsgCConfigt*)0xF11 qP cal*(.;hr_QspiFlashRaXbir ntxt *hpContxt ,u8 erndo32ISrc6; blu8)*Dest6; ,tu32ILength ;hr_QspiFlashRaWnciontxt *hpContxt ,u8 erndo32I); ,t male )*Wr4U] ,tu32ILen ;hr_QspiFlashRafo(XbEeadantxt *hpContxt ,u8 erndo32I); ,tu32ILength ; u16spiFlashRaGetPr,n;
yantxt *pContxt , u8 Enc;*iuh fo(Xbirvontxt *hpContxt ,u8 erndL_Msg Fla= XUr * p_Msg FlCConfigt*)0xF11 qP cal*(.;*iuh fo(XbEeadantxt *hpContxt ,u8 erndo*)0xF11 qS.;
do*)0xF11 qS
ya);*iuh fo(XbXbirntxt *hpContxt ,u8 erndo*)0xF11 qS.;
do*)0xF11 qS
yado*)08_txt bDst);*iuh fo(XbWnciontxt *hpContxt ,u8 ernd o*)0xF11 qS.;
d o*)0xF11 qS
yad male*)08_t *pbSrc);
*#ifontI__cplusplus
} #Sndif**#Sndif /shLI_DEVICE_H */t pan_apps-mini_r5-mymemcpy_strict_(32U)_tested/r,nnt_xbiron/xiFlaqhRa_hw.h 664 0 0 14627 14216660457 27531 0 us.;
root root 0 0 ***********************************************************************/
/**
* Copyright (c) 2020-2022 Xilinx, Inc.nAneerightesrfservad.t*TEPDX-License-Idnntipler:e**T
**********************************************************************/
/**
/************************************************************************/
/**
/*@brirn f= (hxiFlaqhRa_hw.h
rirnncionmin filqhRa hbir__qf= (hill om taiUsaontinie
os5f sh nqhRa.
ririrnirnAIOIFICA
.ec HISTORY:irirnV__q Who breDPtmdddddddChangesirn----- ---- ---------- -------------------------------------------------------irn1.00re svddd07/02/20re Flene releadatrirn
ir
**********************************************************************/
/**
/**#ifnontILI_DEVICE_HW_H
#ontineILI_DEVICE_HW_H
*#ifontI__cplusplus
erneSU;"C" #Sndif******************************** Include Flspszs************************/
/**
/****************************** Co.
*
t Dntinie
os5*********************/
/**
/*/f funch apllowamteco.
*
tsaontineeSha cbirte shill ommayquebsupp SPI iitFpcon fudevith.tam/
#ontineILI_DEVICE_BUSWIDTH_ONE 0U)*#ontine LI_DEVICE_BUSWIDTH_TWO (1U)*#ontine LI_DEVICE_BUSWIDTH_FOUR (2U)**#ontine _CMD;ID;CMD 0x9FU)*#ontine FAESS_CMD;CMD_24BIT 0x0BU)*#ontine DUAL__CMD;CMD_24BIT 0x3BU)*#ontineDQUMD;_CMD;CMD_24BIT 0x6BU)*#ontine FAESS_CMD;CMD_32BIT 0x0CU)*#ontine DUAL__CMD;CMD_32BIT 0x3CU)*#ontineDQUMD;_CMD;CMD_32BIT 0x6CU)*#ontineDQUMD;_CMD;CMD_24BIT2 0xEBU)*#ontine SEC_ERASE 0xD8U)**#ontine _CMD;STATUS 0x05U)*#ontine _CMD;DpcG_STATUS 0x70U)*#ontine WRITE_STATUS (0001Uf*#ontine WRITE_ 0x12Uf*#ontine WRITE_ENABLE (0006Uf*#ontine WRITE_DISABLE (0004U)*#ontine BANK_REG_RD;CMD 0x16U)*#ontine BANK_REG_WR 0x17U)*/shBank regisQSPImincal
e
Ernend wr6; fReg flaMinble2m/
#ontineIEXTADD_REG_RD;CMD 0xC8U)*#ontineIEXTADD_REG_WR 0xC5U)**#ontine
AND_OFFSET 0U) /shFpcon flntrucQile2m/
#ontineIADDR _1_OFFSET (1U) /shMSBab wofdapeae wff*
* incionm/
#ontineIADDR _2_OFFSET (2U) /shMidd (hb wofdapeae wff*
* incionm/
#ontineIADDR _3_OFFSET (3U) /shMidd (hb wofdapeae wff*
* incionm/
#ontineIADDR _4_OFFSET (4U) /shLSBab wofdapeae wff*
* incionm/
#ontineIDATACOFFSET 4U) /shS.;
wofdD
1pecXbir/Wncionm/
#ontineIDUMMY_OFFSET 4U) /shDummy,b woffset 1pecfas d dualmte fquag
ffffffffXSadsnm/
#ontineIDUMMY_ _OC (1U) /shNumbSPI ladummy,b s 1pecfas d dualmte
ffffffffquagfXSadsnm/
#ontineIDUMMY_CLOCKS 8U /shNumbSPI ladummy,b s 1pecfas d dualmte
ffffffffquagfXSadsnm/
#ontineIDUMMY_CLOCKS_*ACRONIX 6U /shF 4-4-4cipinfflaMEnble 4mdummy,cyclew are ontarypff* 6nm/
#ontineIRD;ID; _OC (4U) /shXbir ectn irte f+ 3,b s ectng peasonm/
#ontineIBANK_SEL; _OC (2U) /shBRWR EARWR n irte f+ 1ab bank
ffffffffvalue m/
#ontineIWRITE_ENABLE ; _OC (1U) /shWE n irte fm/
#ontineIEN 04B_ADDR_AIOE 0xB7U)*#ontineIEXIT04B_ADDR_AIOE 0xE9U)*#ontineIEXIT04B_ADDR_AIOE_ISSI 0x29U)**/shnch apllowamteco.
*
tsa ho ipy sh noxtra,b s ill omare supp SPI iitam Fpcon oni iit_0_Dac,.
* It,ps-tdoare pot d
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*nfigble .tam ill omincludeseSha cbirte fte ftpeae wtam/
#ontineIOVERHCMD;S_OC (4U)**/shMax limi wofdwhmt (hDMAhtr- 1 __qminwnd Bnm/
#ontineIDMA_DATACOREN; _OC (0x20000000U)**/shnch apllowamteontinesoare 1pecdualm* con c,.
* Itnm/
#ontineISINGLE (ICE_IO_CONFIGEQUMD;_CMD (LVICE_CR_1_DUMMY_BYTE | \
fLVICE_CR_FAESSQUMD;_CMD)**#ontine DUAL_VICE_PARALLEL_IO_CONFIGEQUMD;_CMD \
(U_0_DEV_LVICE_CR_TWO_MEM_*ASK | \
fL_Msg FlaLVICE_CR_SEP_BUS_*ASK | \
fLVICE_CR_1_DUMMY_BYTE | \
fLVICE_CR_FAESSQUMD;_CMD)***#ontine DUAL_VICE_0ZE;
_IO_CONFIGE_CMD (U_0_DEV_LVICE_CR_TWO_MEM_*ASK | \
fLVICE_CR_1_DUMMY_BYTE | \
fLVICE_CR_FAESSQUMD;_CMD)**/*ID[3U] d to ihifnd nitiasaontine
* PCWnm/
#ontineIDpcon? _OC;
6
B 0x1000000U)*#ontineIBANKS_OC (Dpcon? _OC;
6
B)
#ontineISINGLEBANKS_OC BANKS_OC
*/shBank masknm/
#ontineIBANK*ASK 0xFFFFFFFFU & ~(BANKS_OC -l1))
#ontineISINGLEBANK*ASK BANK*ASK
*/f fuIdnntiplcble . ofdF hbttamaMinble:tamadr, 0tishManu* Itur__qID;tamadr, 1tishdlene b wofdDevitheect- 0xBB 0xBAtamadr, 2tishsecMbitb wofdDevitheectdescrib s 1 con yize:tama
*
bi w: 0x18;e 56
bi w: 0x19;nwnd bi w: 0x20tamaSp- 1ile:tamadr, 0tishManu* Itur__qID;tamadr, 1tishDevitheect- Memory In.
* Itn niti- 0x20 0x02tamadr, 2tishsecMbitb wofdDevitheectdescrib s 1 con yize:tama
*
bi w: 0x18;e 56
bi w: 0x19;nwnd bi w: 0x20tam/**#ontine **CRON;
0x20U)*#ontineeSPANSION;
(0001Uf*#ontine WINBOND;
(00EFU)*#ontine *ACRONIX;
(00C2Uf*#ontine ISSI;
0x9DU)**#ontine Dpcon? _OC;
*
0x14U)*#ontine Dpcon? _OC;
16
0x15U)*#ontine Dpcon? _OC;
32M 0x16U)*#ontine Dpcon? _OC;
64M 0x17U)*#ontine Dpcon? _OC;
12*
0x18U)*#ontine Dpcon? _OC;
56
0x19U)*#ontine Dpcon? _OC;
wnd 0x20U)*#ontineeDpcon? _OC;
1G 0x21U)*#ontineIDpcon? _OC;
2G 0x22U)**/shManble 4mthi Lco.
*
tsaare oif __upp 1pecwnd fte f1Gnm/
#ontineI*ACRONIX;Dpcon? _OC;
wnd 0x1AU)*#ontine *ACRONIX;Dpcon? _OC;
1G 0x1BU)*#ontine *ACRONIX;Dpcon? _OC;
2G 0x1CU)*#ontine *ACRONIX;Dpcon?1_8_V? _OC;
2G 0x3CU)*#ontine *ACRONIX;Dpcon?1_8_V? _OC;
1Gn 0x3BU)*#ontineD*ACRONIX;Dpcon?1_8_V?MX25;
56 0x39U)*#ontineD*ACRONIX;Dpcon?1_8_V?MX66;
wnd 0x3AU)**/sh;
ya * b s m/
#ontineIDpcon? _OC;8M (000100000U)*#ontineIDpcon? _OC;
6
(000200000U)*#ontineIDpcon? _OC;3d 0x0400000U)*#ontineIDpcon? _OC;64M 0x0800000U)*#ontineIDpcon? _OC;
28M (001000000U)*#ontineIDpcon? _OC;256
(0x2000000U)*#ontineIDpcon? _OC;wnd 0x4000000U)*#ontineIDpcon? _OC;1G 0x8000000U)*#ontineIDpcon? _OC;2G (0010000000U)**/shManble 4mm/
#ontineIDISABLE QPI 0x0U)*#ontineIENABLE QPI 0x1U)******************************* TnitiDntinie
os5*********************/
/**
* nitontIntrucQ{Cm d=a_en %hti; /**Deducednd00 0JEDECeect*/t d=a_en ;
yati; /shDeducednd00 01 con yizet*/t 32I=)
;
ya; /**Individualms)
thi Lf xbibinedns)
f*
ya * e theofdspiPllelLco.fig f*/*to32INumS: {
it u16sPr,n;
ya /**Individualmnr,nnthi Lf f* xbibinednnr,nnthi L * e theofdspiPllel f* xb.fig f*/*to32Ia_en ;
ya; /sh;
ya flaonet* con spitt*/t 32I=)
orMaskdCm d=NumDia /shNumbSPI ladie 1pemamteadwhmt (h* con */t};piFlashRaD[3U]irCo;******************** xEnbls (Inline Fboeadsas)iDntinie
os5*********************/****************************** Fboeadsa Proto nits5*********************/
/**
h
*#ifontI__cplusplus
} #Sndif**#Sndif /shLI_DEVICE_HW_H */t pan_apps-mini_r5-mymemcpy_strict_(32U)_tested/xbiron/ 0000775 0 0 0 0 14216660457 23472 5 us.;
root root 0 0 pan_apps-mini_r5-mymemcpy_strict_(32U)_tested/xbiron/xbiron.h 664 0 0 01402 14216660457 25130 0 us.;
root root 0 0 /f fuCopyright 2021-2022 Xilinx, IncfinturnLicensed undSPIsh nApach nLicense,nV__1ile 2.0 (sh n"License");tamayoummayqpot usehshionf= (hexcept flathmpli*
*e DicIsh nLicense.tam YoummayqobtaiUeadcopy flash nLicense atfinturnnnnnhttp://www.apach .org/licenses/LICENSE-2.0finturnUnle wfrequiradicabapplicXQsp lawLf agree fSPIiUeincihmt, softwa*****ndistributed undSPIsh nLicense iondistributed le2Mb "AS IS" BASIS,***nWITHOUT WARRANTIES OR CONDI
.ecS OF ANY KIND, ei iir exp wfr impliad.tam SeeIsh nLicense f sh n ho ipic langur,nngovernamtepeemass
os5te
am limi ae
os5undSPIsh nLicense.tam/
#ifnontI
ON;H__*#ontine
ON;H__**#include "oslayer.h"*#include "sys.h"*#include "crc32.h"*#include "protocol.h"*#include "* con_layout.h"**#Sndif /sh
ON;H__ */t pan_apps-mini_r5-mymemcpy_strict_(32U)_tested/xbiron/xrc32.c 664 0 0 12634 14216660457 24560 0 us.;
root root 0 0 /f funcion isp ionannoxtractnd00 0http://csbruce.xbi/softwa**/xrc32.c funch hbir__qdeclaramteitw oquebpublic domaiUeishshowy
belowfinturnChanges:turnnnnnnAppropriPtmdinclude flspszhavn)beendapeedturnnnnnnVaraXQsp nits5havn)beendchangegpasnpataedturnnnnnnnch aboeadsa Crc32_ChmpuioBuf()feeapot nt aXbtam/
/*----------------------------------------------------------------------------*\turnnCRC-32Iv__1ile 2.0.0 cabCraig Bruce, 2006-04-29.tamturnuncionprogiPsCgeneiPtmseSha CRC-32Ivalues5f sh nflspszname
* iitam cbirte -line arguments.nnnchse aeehsh nsame CRC-32Ivalues5uhes cabGZIP,***n PKZIP,fte fZAIOEM.nnnch Crc32_ChmpuioBuf()fily
alsoquebdet ch d5te
am 5uhes inonpend ntly.tamturnunHIS PROGRAM IS PUBLIC-DOMAIN SOFTWARE.tamturnuBahes fnd h(hb -orie,.
d implementble . "FlspnV__iplcble . UwhmtcCRC"turnucabMark R. Nelson
* Dr. Dobb's Journal,bMay 1992, pp. 64-67.tamturnuv1.0.0:wfriginal releada.turnuv1.0.1:nflxednnriuhf nfigbls.turnuv1.0.2:nflxednyu thhmtcrrr,.turnuv1.0.3: replacednCRCLco.
*
tasXQsp cabgeneiPtpecfboeadsa.turnuv1.0.4: renfigbl.
d cpin, mir_ ANSI C.nn1994-12-05.turnuv2.0.0:wrewrote iiusoememory buf __ & nt aXbasXQsp, 2006-04-29.t\*----------------------------------------------------------------------------*/**#include "xbiron.h"****----------------------------------------------------------------------------*\turnnNAME:turnnnnnCrc32_ChmpuioBuf()f-athmputmseSha CRC-32Ivaluewofdaememory buf __turnnDESCRIP
.ec:turnnnnnChmputmsef accumulPtmseSha CRC-32Ivalue5f aememory buf __.turnnnnnnch 'inCrc32' giveinl previously accumulPtmd CRC-32Ivalue5 iiallowfinnnnnnanCRCL oquebgeneiPtmd5f multiple sequnntial buf __-ful wflad
.turnnnnnnch 'inCrc32' f sh nflene buf __ mune be zero.turnnARGUMENTS:turnnnnninCrc32f-aaccumulPtmd CRC-32Ivalue, mune be 0lue
lene cal
turnnnnnbufnnnnn- buf __ oqthmputm CRC-32Ivalue5f turnnnnnbufLendn- numbSPI lab s * buf __turnnRETURNS:turnnnnncrc32f-athmputmd CRC-32IvalueturnnERRORS:turnnnnn(no err
aeehposs
atica\*----------------------------------------------------------------------------*/**o*)0xF11 Crc32_ChmpuioBuf( o*)0xF11 inCrc32,t malvoid *buf, return; breeeeeeeeeeeeeeeeeeeeeeeeeeeeo*)0xF11 bufLend.ASa))))nt aXba male*)0xF11 crcTXQsp[256};
u
ddd0x 0 0,0x77073096d0xEE0E612Cd0x990951BAd0x076DC419,0x706AF48Fd0xE963A535,
ddd0x9E6495A3d0x0EDB8832,0x79DCB8A4d0xE0D5E91Ed0x97D2D988d0x09B64C2B,0x7EB17CBD,
ddd0xE7B82D07d0x90BF1D91d0x1DB71064d0x6AB020F2,0xF3B97148d0x84BE41DEd0x1ADAD47D,
ddd0x6DDDE4EB,0xF4D4B551d0x83D385C7d0x136C9856d0x646BA8C0,0xFD62F97Ad0x8A65C9EC,
ddd0x14015C4Fd0x63 66CD9,0xFA0F3D63d0x8D080DF5,0x3B6E20C8d0x4C69105Ed0xD56041E4,
ddd0xA2677172,0x3C03E4D1d0x4B04D447d0xD20D85FDd0xA50AB56B,0x35B5A8FAd0x42B2986C,
ddd0xDBBBC9D6d0xACBCF940,0x32D86CE3d0x45DF5C75,0xDCD60DCFd0xABD13D59,0x26D930AC,
ddd0x51DE003Ad0xC8D75180,0xBFD06116d0x21B4F4B5d0x56B3C423d0xCFBA9599,0xB8BDA50F,
ddd0x2802B89Ed0x5F058808d0xC60CD9B2,0xB10BE924d0x2F6F7C87d0x58684C11d0xC1611DAB,
ddd0xB6662D3Dd0x76DC4190,0x01DB7106d0x98D220BCd0xEFD5102Ad0x71B18589,0x06B6B51F,
ddd0x9FBFE4A5d0xE8B8D433d0x7807C9A2,0x0F00F934d0x9609A88Ed0xE10E9818d0x7F6A0DBB,
ddd0x086D3D2Dd0x91646C97d0xE6635C01d0x6B6B51F4d0x1C6C6162,0x856530D8,0xF262004E,
ddd0x6C0695EDd0x1B01A57B,0x8208F4C1,0xF50FC457d0x65B0D9C6d0x12B7E950,0x8BBEB8EA,
ddd0xFCB9887Cd0x62DD1DDFd0x15DA2D49,0x8CD37CF3d0xFBD44C65d0x4DB26158,0x3AB551CE,
ddd0xA3BC0074d0xD4BB30E2,0x4ADFA541,0x3DD895D7d0xA4D1C46Dd0xD3D6F4FB,0x4369E96A,
ddd0x346ED9FCd0xAD678846d0xDA60B8D0,0x44042D73d0x33031DE5d0xAA0A4C5Fd0xDD0D7CC9,
ddd0x5005713Cd0x270241AAd0xBE0B1010,0xC90C2086d0x5768B525d0x206F85B3d0xB966D409,
ddd0xCE61E49Fd0x5EDEF90Ed0x29D9C998,0xB0D09822,0xC7D7A8B4d0x59B33D17d0x2EB40D81,
ddd0xB7BD5C3B,0xC0BA6CADd0xEDB88320,0x9ABFB3B6,0x03B6E20Cd0x74B1D29Ad0xEAD54739,
ddd0x9DD277AFd0x04DB2615d0x73DC1683d0xE363 B12,0x94643B84d0x0D6D6A3Ed0x7A6A5AA8,
ddd0xE40ECF0B,0x9309FF9Dd0x0A00AE27d0x7D079EB1d0xF00F9344d0x8708A3D2d0x1E01F268,
ddd0x6906C2FEd0xF762575Dd0x806567CBd0x196C3671d0x6E6B06E7d0xFED41B76,0x89D32BE0,
ddd0x10DA7A5Ad0x67DD4ACCd0xF9B9DF6F,0x8EBEEFF9d0x17B7BE43d0x60B08ED5,0xD6D6A3E8,
ddd0xA1D1937Ed0x38D8C2C4d0x4FDFF252d0xD1BB67F1d0xA6BC5767d0x3FB506DDd0x48B2364B,
ddd0xD80D2BDAd0xAF0A1B4Cd0x36034AF6,0x41047A60,0xDF60EFC3d0xA867DF55,0x316E8EEF,
ddd0x4669BE79d0xCB61B38Cd0xBC66831Ad0x256FD2A0,0x5268E236d0xCC0C7795,0xBB0B4703,
ddd0x220216B9d0x5505262F,0xC5BA3BBEd0xB2BD0B28,0x2BB45A92d0x5CB36A04d0xC2D7FFA7,
ddd0xB5D0CF31d0x2CD99E8Bd0x5BDEAE1Dd0x9B64C2B0,0xEC63F226d0x756AA39Cd0x026D930A,
ddd0x9C0906A9d0xEB0E363F,0x72076785,0x05005713d0x95BF4A82d0xE2B87A14d0x7BB12BAE,
ddd0x0CB61B38d0x92D28E9Bd0xE5D5BE0Dd0x7CDCEFB7d0x0BDBDF21d0x86D3D2D4d0xF1D4E242,
ddd0x68DDB3F8d0x1FDA836Ed0x81BE16CDd0xF6B9265Bd0x6FB077E1d0x18B74777d0x88085AE6,
ddd0xFF0F6A70,0x66063BCAd0x11010B5Cd0x8F659EFFd0xF862AE69d0x616BFFD3d0x166CCF45,
ddd0xA00AE278d0xD70DD2EEd0x4E048354d0x3903B3C2d0xA7672661d0xD06016F7d0x4969474D,
ddd0x3E6E77DBd0xAED16A4Ad0xD9D65ADCd0x40DF0B66d0x37D83BF0,0xA9BCAE53d0xDEBB9EC5,
ddd0x47B2CF7Fd0x3 B5FFE9,0xBDBDF21Cd0xCABAC28Ad0x53B39330d0x24B4A3A6d0xBAD03605,
ddd0xCDD70693d0x54DE5729,0x23D967BFd0xB3667A2Ed0xC4614AB8d0x5D681B02d0x2A6F2B94,
ddd0xB40BBE37d0xC30C8EA1d0x5A05DF1Bd0x2D02EF8D } urn;o*)0xF11 crc32 urn;onsignednchar *byioBuf urn;o*)0xF11 i bre/**aaccumulPtmncrc32ff buf __ **/turn;crc32f=ninCrc32f^ 0xFFFFFFFF urn;byioBuff=n(onsignednchar*) buf urn;apec i=0; i < bufLen; i++fi eeeeeeeecrc32f=n(crc32f>> 8)f^ crcTXQsp[n(crc32f^;byioBuf[i]) &000FF ]TRffff}*))))XST_SU( crc32f^ 0xFFFFFFFF )it}* pan_apps-mini_r5-mymemcpy_strict_(32U)_tested/xbiron/xrc32.h 664 0 0 01416 14216660457 24561 0 us.;
root root 0 0 /f fuCopyright 2021-2022 Xilinx, IncfinturnLicensed undSPIsh nApach nLicense,nV__1ile 2.0 (sh n"License");tamayoummayqpot usehshionf= (hexcept flathmpli*
*e DicIsh nLicense.tam YoummayqobtaiUeadcopy flash nLicense atfinturnnnnnhttp://www.apach .org/licenses/LICENSE-2.0finturnUnle wfrequiradicabapplicXQsp lawLf agree fSPIiUeincihmt, softwa*****ndistributed undSPIsh nLicense iondistributed le2Mb "AS IS" BASIS,***nWITHOUT WARRANTIES OR CONDI
.ecS OF ANY KIND, ei iir exp wfr impliad.tam SeeIsh nLicense f sh n ho ipic langur,nngovernamtepeemass
os5te
am limi ae
os5undSPIsh nLicense.tam/
#ifnontI
RCxF1H__*#ontine
RCxF1H__**o*)0xF11 Crc32_ChmpuioBuf( o*)0xF11 inCrc32,t malvoid *buf, return; breeeeeeeeeeeeeeeeeeeeeeeeeeeeo*)0xF11 bufLend.;**#Sndif /sh
RCxF1H__ */t pan_apps-mini_r5-mymemcpy_strict_(32U)_tested/xbiron/* con_layout.h 664 0 0 02201 14216660457 26330 0 us.;
root root 0 0 /f fuCopyright 2021-2022 Xilinx, IncfinturnLicensed undSPIsh nApach nLicense,nV__1ile 2.0 (sh n"License");tamayoummayqpot usehshionf= (hexcept flathmpli*
*e DicIsh nLicense.tam YoummayqobtaiUeadcopy flash nLicense atfinturnnnnnhttp://www.apach .org/licenses/LICENSE-2.0finturnUnle wfrequiradicabapplicXQsp lawLf agree fSPIiUeincihmt, softwa*****ndistributed undSPIsh nLicense iondistributed le2Mb "AS IS" BASIS,***nWITHOUT WARRANTIES OR CONDI
.ecS OF ANY KIND, ei iir exp wfr impliad.tam SeeIsh nLicense f sh n ho ipic langur,nngovernamtepeemass
os5te
am limi ae
os5undSPIsh nLicense.tam/
#ifnontIDpcon?LAYOUT1H__*#ontine Dpcon?LAYOUT1H__*
#ontineIRBE_VERSIONeeeeeeeee0
#ontineIRBE_RESERVED_BYTES 100
nitontIntrucQsRfservadBlockEntryi eeeeo*)0xF11 qV__1ile urn;o*)0xF11 qImr,nOffset urn;o*)0xF11 qImr,n;
ya urn;o*)0xF11 qImr,nChecksum urn;o*)08_t pbImr,nId[128] urn;o*)08_t pbRfservad[RBE_RESERVED_BYTES] urn;o*)0xF11 qErrCode;eeeeeeeeee/shUsmd5f livmdtr-ckamte*/turn;o*)0xF11 qErrBSP;eeeeeeeeeee/shUsmd5f livmdtr-ckamte*/turn;o*)0xF11 qEntryChecksum eeee/shUsmd5ue
con */t};RfservadBlockEntry;**#Sndif /shDpcon?LAYOUT1H__ */t pan_apps-mini_r5-mymemcpy_strict_(32U)_tested/xbiron/oslayer.c 664 0 0 01243 14216660457 25314 0 us.;
root root 0 0 /f fuCopyright 2021-2022 Xilinx, IncfinturnLicensed undSPIsh nApach nLicense,nV__1ile 2.0 (sh n"License");tamayoummayqpot usehshionf= (hexcept flathmpli*
*e DicIsh nLicense.tam YoummayqobtaiUeadcopy flash nLicense atfinturnnnnnhttp://www.apach .org/licenses/LICENSE-2.0finturnUnle wfrequiradicabapplicXQsp lawLf agree fSPIiUeincihmt, softwa*****ndistributed undSPIsh nLicense iondistributed le2Mb "AS IS" BASIS,***nWITHOUT WARRANTIES OR CONDI
.ecS OF ANY KIND, ei iir exp wfr impliad.tam SeeIsh nLicense f sh n ho ipic langur,nngovernamtepeemass
os5te
am limi ae
os5undSPIsh nLicense.tam/
#include "xbiron.h"**#if !ontine (DO_; )
void no_tr-ce(void.ASa} #Sndif* pan_apps-mini_r5-mymemcpy_strict_(32U)_tested/xbiron/oslayer.h 664 0 0 03442 14216660457 25324 0 us.;
root root 0 0 /f fuCopyright 2021-2022 Xilinx, IncfinturnLicensed undSPIsh nApach nLicense,nV__1ile 2.0 (sh n"License");tamayoummayqpot usehshionf= (hexcept flathmpli*
*e DicIsh nLicense.tam YoummayqobtaiUeadcopy flash nLicense atfinturnnnnnhttp://www.apach .org/licenses/LICENSE-2.0finturnUnle wfrequiradicabapplicXQsp lawLf agree fSPIiUeincihmt, softwa*****ndistributed undSPIsh nLicense iondistributed le2Mb "AS IS" BASIS,***nWITHOUT WARRANTIES OR CONDI
.ecS OF ANY KIND, ei iir exp wfr impliad.tam SeeIsh nLicense f sh n ho ipic langur,nngovernamtepeemass
os5te
am limi ae
os5undSPIsh nLicense.tam/
#ifnontIOSLAYER1H__*#ontine OSLAYER1H__*
#include
#include
#include
#include
#include
#include
#include
#include
#include
#include
#include
*#ifontI__linux__*
#include
#include
#include
#include
#include
#include
#include
#ontine _GNU_SOURCE
#include
#include
*#ifontIDO_; *#ontineeSYSPRINTnnnnnriuhf #Sndif**#Srr,L/shr,nnt (baeehmetal) ei iir a72wfr r5am/**#ontine htole32(x) (x)*#ontine le32toh(x) (x)**#ifontIDO_; *#include "xil_nriuhf.h"*#ontineeSYSPRINTnnnnxil_nriuhf #Sndif**#Sndif /sh__linux__ /**#ifontIDO_; *#ontinee; IeeeeeeeeeeeeeeeeeSYSPRINT("%s: %d\n\r",__ boe__,__LINE__)*#ontinee; _PRINTnnnneeeeeeeeeSYSPRINT*#ontinee; _DECL(x,yIeeeeeeeeex y*#ontinee; _ASSIGN(x,yIeeeeeeex=(y)*#Srr,*#ontinee; I
erneSU;void no_tr-ce(void.;*#ontinee; _PRINT(str,...Ieeeeno_tr-ce()*#ontinee; _DECL(x,yI*#ontinee; _ASSIGN(x,yI*#Sndif /shDO_; /****turnUseful placeholdSPIiUef loopsfSPIiUdlcbleps-tdoa neSm ionemptytam/
#ontineINOTHING**#Sndif /shOSLAYER1H__ */t pan_apps-mini_r5-mymemcpy_strict_(32U)_tested/xbiron/pnt.c 664 0 0 44742 14216660457 24423 0 us.;
root root 0 0 /f fuCopyright 2021-2022 Xilinx, IncfinturnLicensed undSPIsh nApach nLicense,nV__1ile 2.0 (sh n"License");tamayoummayqpot usehshionf= (hexcept flathmpli*
*e DicIsh nLicense.tam YoummayqobtaiUeadcopy flash nLicense atfinturnnnnnhttp://www.apach .org/licenses/LICENSE-2.0finturnUnle wfrequiradicabapplicXQsp lawLf agree fSPIiUeincihmt, softwa*****ndistributed undSPIsh nLicense iondistributed le2Mb "AS IS" BASIS,***nWITHOUT WARRANTIES OR CONDI
.ecS OF ANY KIND, ei iir exp wfr impliad.tam SeeIsh nLicense f sh n ho ipic langur,nngovernamtepeemass
os5te
am limi ae
os5undSPIsh nLicense.tam/
#include "xbiron.h"*#include "pef.h"*
nt aXbavoid ClearCbirte AXSa(Cbirte AXSaxt ,A.ASa))))memseon ,A,0,thi of(Cbirte AXSa)f-a4.**)))) -A->qChecksum = ~Crc32_ChmpuioBuf( return; breeeeeeee0, return; breeeeeeeeeeee/sho*)0xF11 inCrc32,t*/turn; breeeeeeeeeeee ,A,eturn; breeeeeeeeeeee/sh malvoid *buf,t*/turn; breeeeeeeeeeeethi of(Cbirte AXSa)f-a4ee/sho*)0xF11 bufLend*/turn; breeeeeeeeeeee)it}**void irvoPEF(ProgEnvFboesxt PEF.ASa))))Cbirte AXSaxt ,A**))))Rg peasoAXSaxt RA**))))Loop= XSext LS bre LS
= & PEF->tLS bre LS->yD[3U]V__ipleD = farr, bre LS->qMismatch*/
= 0 bre CA
= & PEF->pMA->tCbirte AXSa bre RA
= & PEF->pMA->tRg peasoAXSa breClearCbirte AXSa( ,A. brememseon RA,0,thi of(Rg peasoAXSa)f-a8) bre RA->qChecksum = ~Crc32_ChmpuioBuf( return; breeeeeeee0, return; breeeeeeeeeeee/sho*)0xF11 inCrc32,t*/turn; breeeeeeeeeeee RA,eturn; breeeeeeeeeeee/sh malvoid *buf,t*/turn; breeeeeeeeeeeethi of(Rg peasoAXSa)f-a8ee/sho*)0xF11 bufLend*/turn; breeeeeeeeeeee)it bre RA->qFEEDC0DE = htole32(FEEDC0DE. bre PEF->rD
Barrier( PEF,CACHE_REGION;
_AREA)it bre PEF->rD
Barrier( PEF,CACHE_REGION;RESP_AREA)it bre PEF->rD
Barrier( PEF,CACHE_REGION;AUX_AREA)it bre PEF->rD
Barrier( PEF,CACHE_REGION;PRIV_AREA)it}****turnRST_SU;farr, if Step;fai
e
i.e. SIM_STOP ionenc/
eredtur/
bool StepPEF(ProgEnvFboesxt PEF.ASa))))Cbirte AXSaxt ,A**))))Rg peasoAXSaxt RA**))))Loop= XSext LS ))))bool yRet (1tru, #ifontIDO_; *))))char pcCbirte Stramt[
AND_STRING_BUF _OC]; #Sndif** bre LS
= & PEF->tLS bre CA
= & PEF->pMA->tCbirte AXSa bre RA
= & PEF->pMA->tRg peasoAXSa bre PEF->rD
Barrier( PEF,CACHE_REGION;
_AREA)it bre LS->qCS
= Crc32_ChmpuioBuf( return; breeeeeeee0, return; breeeeeeeeeeee/sho*)0xF11 inCrc32,t*/turn; breeeeeeeeeeee ,A,eturn; breeeeeeeeeeee/sh malvoid *buf,t*/turn; breeeeeeeeeeeethi of(Cbirte AXSa)f-a4ee/sho*)0xF11 bufLend*/turn; breeeeeeeeeeee)iteeeeif(le32toh( -A->qChecksum)wSUC LS->qCSfi eeeeeeeeif(0 == ( LS->qMismatch*/
++ &000fffff)fi eeeeeeeeeeee; _PRINT("%08x %08x %08x %08x %08x %08x %08x %08x %08x ... %08x (Mismatch, expected %08x)\n\r", return; breeeeeeeee -A->qCbirte , return; breeeeeeeee -A->pqArgs[0], return; breeeeeeeee -A->pqArgs[1], return; breeeeeeeee -A->pqArgs[2], return; breeeeeeeee -A->pqArgs[3], return; breeeeeeeee -A->pqArgs[4], return; breeeeeeeee -A->pqArgs[5], return; breeeeeeeee -A->pqArgs[6], return; breeeeeeeee -A->pqArgs[7], return; breeeeeeeeele32toh( -A->qChecksum), return; breeeeeeeee LS->qCS return; breeeeeeeeeIit bre}t breXST_SU;tru, bre}t ; _PRINT("%s %08x %08x %08x %08x %08x %08x %08x %08x ... %08x (Match)\n\r", return; breGetCbirte Stramt( -A->qCbirte ,pcCbirte Stramt), return; bre -A->pqArgs[0], return; bre -A->pqArgs[1], return; bre -A->pqArgs[2], return; bre -A->pqArgs[3], return; bre -A->pqArgs[4], return; bre -A->pqArgs[5], return; bre -A->pqArgs[6], return; bre -A->pqArgs[7], return; bre LS->qCS return; bre.**)))) -A->qChecksum ^= ~0 bre LS->qMismatch*/
= 0 bre/shEa om themune set ERR_NONE explicitlyd*/turn; RA->qErrCode = htole32((o*)0xF11)ERR_IN NAL); turn; RA->qErrBSP = htole32((o*)0xF11)ERR_IN NAL); tturn;switch((
AND)le32toh( -A->qCbirte ) ontaryp: return; RA->qErrCode = htole32((o*)0xF11)ERR_
AND); return; RA->qErrBSP = htole32(0); return; bree the
AND_VERIFY;Dpcon: return;{ return; bre LS->tV__ipyD[3U]ArgsIn.q>Bnbmoe
oirCo = le32toh( -A->pqArgs[0]); return; bre LS->tV__ipyD[3U]ArgsIn.qBusWidicI= le32toh( -A->pqArgs[1]); return; bre LS->tV__ipyD[3U]ArgsIn.q_Msg __ipiiralInpuiSpee HzI= le32toh( -A->pqArgs[2]); return; bre LS->tV__ipyD[3U]ArgsIn.qP cal*(I= le32toh( -A->pqArgs[3]); return; bre LS->tV__ipyD[3U]ArgsIn.qCach Coh__uppDMAh= le32toh( -A->pqArgs[4]); return; bre LS->tV__ipyD[3U]ArgsIn.qPEB;
ya = le32toh( -A->pqArgs[5]); return; bre LS->tV__ipyD[3U]ArgsIn.qNumPEBs = le32toh( -A->pqArgs[6]); return; bre LS->tV__ipyD[3U]ArgsIn.q=ubs)
;
ya = le32toh( -A->pqArgs[7]); return; breif( LS->tV__ipyD[3U]ArgsIn.q=ubs)
;
ya SUC0fi eeeeeeeeeeeeeeee; _PRINT("----------------%d\n\r",__LINE__); eeeeeeeeeeeeeeee LS->tV__ipyD[3U]ArgsIn.qNum=ubs)
s = return; breeeeeeeee( LS->tV__ipyD[3U]ArgsIn.qPEB;
ya *e LS->tV__ipyD[3U]ArgsIn.qNumPEBs) return; breeeeeeeee/turn; breeeeeeeeeeeee LS->tV__ipyD[3U]ArgsIn.q=ubs)
;
ya; eeeeeeeeeeee}crrr,i eeeeeeeeeeeeeeee; _PRINT("----------------%d\n\r",__LINE__); eeeeeeeeeeeeeeee LS->tV__ipyD[3U]ArgsIn.qNum=ubs)
s = ~0 breeeeeeeee}
return; breif( LS->yD[3U]V__ipleDfi eeeeeeeeeeeeeeee/*turn; * Cal
e
d00 0a non-inie
al ru. ofdx86_appturn; * Simply)check f err
turn; * _0_Dacs alXSady ru.namtturn; */turn; breeeeeeeee RA->qErrBSP = htole32(0); return;urn; breif(0 == memcmp(& LS->tV__ipleDD[3U]Args,& LS->tV__ipyD[3U]ArgsIn,thi of(V__ipyD[3U]Args))fi eeeeeeeeeeeeeeeeeeee; _PRINT("----------------%d\n\r",__LINE__); eeeeeeeeeeeeeeeeeeee RA->qErrCode = htole32(ERR_NONE); eeeeeeeeeeeeeeee}crrr,i eeeeeeeeeeeeeeeeeeee; _PRINT("----------------%d\n\r",__LINE__); eeeeeeeeeeeeeeeeeeee RA->qErrCode = htole32(ERR_BOARD;Dpcon); eeeeeeeeeeeeeeee} eeeeeeeeeeee}crrr,i eeeeeeeeeeeeeeeeif(0fi eeeeeeeeeeeeeeeeeeee; eeeeeeeeeeeeeeee}crrr,iif(0 eeeeeeeeeeeeeeeeeeeeeeee|| (0 == LS->tV__ipyD[3U]ArgsIn.qPEB;
ya) return; breeeeeeeeeeeee|| ( LS->tV__ipyD[3U]ArgsIn.qPEB;
ya > MAX_PEB? _OC;BYTES) return; breeeeeeeeefi eeeeeeeeeeeeeeeeeeee RA->qErrCode = htole32(ERR_PEB? _OC); eeeeeeeeeeeeeeeeeeee RA->qErrBSP = htole32(0); return;urn; breeeee; _PRINT("----------------%d\n\r",__LINE__); eeeeeeeeeeeeeeee}crrr,iif(0 eeeeeeeeeeeeeeeeeeeeeeee|| (0 == LS->tV__ipyD[3U]ArgsIn.q=ubs)
;
ya) return; breeeeeeeeeeeee|| ( LS->tV__ipyD[3U]ArgsIn.q=ubs)
;
ya >= LS->tV__ipyD[3U]ArgsIn.qPEB;
ya) return; breeeeeeeeeeeee|| (0 SUC( LS->tV__ipyD[3U]ArgsIn.qPEB;
ya % LS->tV__ipyD[3U]ArgsIn.q=ubs)
;
ya)) return; breeeeeeeeeeeee|| ((3* LS->tV__ipyD[3U]ArgsIn.q=ubs)
;
ya) > LS->tV__ipyD[3U]ArgsIn.qPEB;
ya) return; breeeeeeeeefi eeeeeeeeeeeeeeeeeeee RA->qErrCode = htole32(ERR_SUBSECTOR? _OC); eeeeeeeeeeeeeeeeeeee RA->qErrBSP = htole32(0); return;urn; breeeee; _PRINT("----------------%d\n\r",__LINE__); eeeeeeeeeeeeeeee}crrr,i eeeeeeeeeeeeeeeeeeee; _PRINT("----------------%d\n\r",__LINE__); eeeeeeeeeeeeeeeeeeee RA->qErrCode = htole32( PEF->rV__ipyD[3U]( PEF,& RA->qErrBSP)); eeeeeeeeeeeeeeeeeeee RA->qErrBSP = htole32( RA->qErrBSP); eeeeeeeeeeeeeeeeeeeeif(htole32(ERR_NONE) == RA->qErrCodefi eeeeeeeeeeeeeeeeeeeeeeee LS->yD[3U]V__ipleD = tru, breeeeeeeeeeeeeeeeeeeeememcpy(& LS->tV__ipleDD[3U]Args,& LS->tV__ipyD[3U]ArgsIn,thi of(V__ipyD[3U]Args)) breeeeeeeeeeeeeeeeeeeee; _PRINT("----------------%d\n\r",__LINE__); eeeeeeeeeeeeeeeeeeee} eeeeeeeeeeeeeeee} eeeeeeeeeeee}t bre}t bre bree the
AND_VERIFY;IMAGE: return;if( LS->yD[3U]V__ipleDfi eeeeeeeeeeeeo*)0xF11 qImr,nOffset urn;eeeeeeeeo*)0xF11 qImr,n;
ya; eeeeeeeeeeeeo*)0xF11 qImr,nChecksum urn;eeeeeeeeo*)0xF11 qChmpuiodChecksum urn;eeeeeeeeo*)0xF11 qImr,nPEBs urn;eeeeeeeeo*)0xF11 qPEB;.;
;
return; breqImr,nOffset = le32toh( -A->pqArgs[0]); return; breqImr,n;
yaI= le32toh( -A->pqArgs[1]); return; breqImr,nChecksumI= le32toh( -A->pqArgs[2]); return; breqImr,nPEBs = (qImr,n;
yaI+ LS->tV__ipleDD[3U]Args.qPEB;
ya -l1) / LS->tV__ipleDD[3U]Args.qPEB;
ya; return; breqPEB;.;
= qImr,nOffset / LS->tV__ipleDD[3U]Args.qPEB;
ya; return; breif(qImr,nOffset % LS->tV__ipleDD[3U]Args.qPEB;
yafi eeeeeeeeeeeeeeee RA->qErrCode = htole32(ERR_IMAGE_ALIGNMENT); return; bre}crrr,iif(qPEB;.;
>= LS->tV__ipleDD[3U]Args.qNumPEBs)i eeeeeeeeeeeeeeee RA->qErrCode = htole32(ERR_PEB?NUMBER); return; bre}crrr,iif(qImr,nPEBs > LS->tV__ipleDD[3U]Args.qNumPEBs)i eeeeeeeeeeeeeeee RA->qErrCode = htole32(ERR_IMAGE_ _OC); eeeeeeeeeeee}crrr,iif((qPEB;.;
+eqImr,nPEBs) > LS->tV__ipleDD[3U]Args.qNumPEBs)i eeeeeeeeeeeeeeee RA->qErrCode = htole32(ERR_IMAGE_ _OC); eeeeeeeeeeee}crrr,i eeeeeeeeeeeeeeeeo*)0xF11 qPEB; eeeeeeeeeeeeeeeeo*)0xF11 qdr, sLeft; eeeeeeeeeeeeeeeeo*)0xF11 qdr, sToChmpuio; return; breeeeef ( return; breeeeeeeeeeeeeqPEB = qPEB;.;
, qChmpuiodChecksum
= 0, qdr, sLeft = qImr,n;
ya; return; breeeeeeeeeeeeeqdr, sLeft > 0; return; breeeeeeeeeeeeeqPEB++ return; breeeeeeeeefi eeeeeeeeeeeeeeeeeeee RA->qErrCode = htole32( PEF->rXbirPEB( PEF,qPEB,& RA->qErrBSP, PEF->pAA->pbD
)); eeeeeeeeeeeeeeeeeeee RA->qErrBSP = htole32( RA->qErrBSP); eeeeeeeeeeeeeeeeeeeeif( RA->qErrCode != le32toh(ERR_NONE)fi eeeeeeeeeeeeeeeeeeeeeeee eeeeeeeeeeeeeeeeeeee} return; breeeeeeeeeif(qdr, sLeft > LS->tV__ipleDD[3U]Args.qPEB;
yafi eeeeeeeeeeeeeeeeeeeeeeeeqdr, sToChmpuio = LS->tV__ipleDD[3U]Args.qPEB;
ya; return; breeeeeeeeeeeeeqdr, sLeft -= LS->tV__ipleDD[3U]Args.qPEB;
ya; return; breeeeeeeee}crrr,i eeeeeeeeeeeeeeeeeeeeeeeeqdr, sToChmpuio = qdr, sLeft; eeeeeeeeeeeeeeeeeeeeeeeeqdr, sLeft = 0; return; breeeeeeeee} eeeeeeeeeeeeeeeeeeeeqChmpuiodChecksum
= Crc32_ChmpuioBuf( return; breeeeeeeeeeeeeeeeeeeeeeeeqChmpuiodChecksum,etu/sho*)0xF11 inCrc32,t*/turn; breeeeeeeeeeeeeeeeeeeeeeeeeeee PEF->pAA->pbD
,etu/sh malvoid *buf,t*/turn; breeeeeeeeeeeeeeeeeeeeeeeeeeeeqdr, sToChmpuio /sho*)0xF11 bufLend*/turn; breeeeeeeeeeeeeeeeeeeeeeeeeeee); eeeeeeeeeeeeeeee} eeeeeeeeeeeeeeeeif((ERR_NONE == RA->qErrCodefi&& (qChmpuiodChecksum
!=eqImr,nChecksum)fi eeeeeeeeeeeeeeeeeeee RA->qErrCode = htole32(ERR_CHECKSUM); eeeeeeeeeeeeeeeeeeee RA->qErrBSP = htole32(qChmpuiodChecksum); eeeeeeeeeeeeeeee} eeeeeeeeeeee}t bre}crrr,i eeeeeeeeeeee RA->qErrCode = htole32(ERR_Dpcon?UNVERIFIED); return; bre RA->qErrBSP = htole32(0); return;}t bre bree the
AND_GET_MULTIBOOT;BYTES: return;if( LS->yD[3U]V__ipleDfi eeeeeeeeeeeeo*)0xF11 qMultibootdr, s; return; bre RA->qErrCode = htole32( PEF->rGetMultibootdr, s( PEF,& RA->qErrBSP,&qMultibootdr, s)); eeeeeeeeeeee RA->qErrBSP = htole32( RA->qErrBSP); eeeeeeeeeeeeif(1 eeeeeeeeeeeeeeee&& (le32toh(ERR_NONE) == RA->qErrCodef eeeeeeeeeeeeeeee&& ( return; breeeeeeeee(qMultibootdr, s > ( LS->tV__ipleDD[3U]Args.qPEB;
ya * LS->tV__ipleDD[3U]Args.qNumPEBs)) return; breeeeeeeee|| return; breeeeeeeee(0 SUC(qMultibootdr, s % LS->tV__ipleDD[3U]Args.qPEB;
yaf) return; breeeeeeeeef return; breee)i eeeeeeeeeeeeeeee RA->qErrCode = htole32(ERR_MULTIBOOT;BYTES); eeeeeeeeeeee} eeeeeeeeeeee RA->pqD
[0] = htole32(qMultibootdr, s);t bre}crrr,i eeeeeeeeeeee RA->qErrCode = htole32(ERR_Dpcon?UNVERIFIED); return; bre RA->qErrBSP = htole32(0); return;}t bre bree the
AND_ERASE_PEBS: return;if( LS->yD[3U]V__ipleDfi eeeeeeeeeeeeo*)0xF11 qPEB;.;
;
eeeeeeeeeeeeo*)0xF11 qPEBEnd; return; breqPEB;.;
= le32toh( -A->pqArgs[0]); return; breqPEBEndI= le32toh( -A->pqArgs[1]); eeeeeeeeeeeeif((qPEBEndI= LS->tV__ipleDD[3U]Args.qNumPEBs)i|| (qPEBEndI>= LS->tV__ipleDD[3U]Args.qNumPEBs))i eeeeeeeeeeeeeeee RA->qErrCode = htole32(ERR_PEB?NUMBER); return; bre bre RA->qErrBSP = htole32(0); return; bre}crrr,i eeeeeeeeeeeeeeee RA->qErrCode = htole32( PEF->rEr thPEBs( PEF,qPEB;.;
,qPEBEnd,& RA->qErrBSP)); eeeeeeeeeeeeeeee RA->qErrBSP = htole32( RA->qErrBSP); eeeeeeeeeeee}t bre}crrr,i eeeeeeeeeeee RA->qErrCode = htole32(ERR_Dpcon?UNVERIFIED); return; bre RA->qErrBSP = htole32(0); return;}t bre bree the
AND__CMD_PEB: return;if( LS->yD[3U]V__ipleDfi eeeeeeeeeeeeo*)0xF11 qPEBNumbSP; return; breqPEBNumbSPI= le32toh( -A->pqArgs[0]); return; breif(qPEBNumbSPI>= LS->tV__ipleDD[3U]Args.qNumPEBs)i eeeeeeeeeeeeeeee RA->qErrCode = htole32(ERR_PEB?NUMBER); return; bre bre RA->qErrBSP = htole32(0); return; bre}crrr,i eeeeeeeeeeee bre PEF->rD
Barrier( PEF,CACHE_REGION;AUX_AREA)it breeeeeeeeeeeee RA->qErrCode = htole32( PEF->rXbirPEB( PEF,qPEBNumbSP,& RA->qErrBSP, PEF->pAA->pbD
)); eeeeeeeeeeeeeeee RA->qErrBSP = htole32( RA->qErrBSP); eeeeeeeeeeee}t bre}crrr,i eeeeeeeeeeee RA->qErrCode = htole32(ERR_Dpcon?UNVERIFIED); return; bre RA->qErrBSP = htole32(0); return;}t bre bree the
AND_WRITE_PEB: return;if( LS->yD[3U]V__ipleDfi eeeeeeeeeeeeo*)0xF11 qPEBNumbSP; return; breqPEBNumbSPI= le32toh( -A->pqArgs[0]); return; breif(qPEBNumbSPI>= LS->tV__ipleDD[3U]Args.qNumPEBs)i eeeeeeeeeeeeeeee RA->qErrCode = htole32(ERR_PEB?NUMBER); return; bre bre RA->qErrBSP = htole32(0); return; bre}crrr,i eeeeeeeeeeee bre PEF->rD
Barrier( PEF,CACHE_REGION;AUX_AREA)it breeeeeeeeeeeee RA->qErrCode = htole32( PEF->rWritePEB( PEF,qPEBNumbSP, PEF->pAA->pbD
,& RA->qErrBSP)); eeeeeeeeeeeeeeee RA->qErrBSP = htole32( RA->qErrBSP); eeeeeeeeeeee}t bre}crrr,i eeeeeeeeeeee RA->qErrCode = htole32(ERR_Dpcon?UNVERIFIED); return; bre RA->qErrBSP = htole32(0); return;}t bre bree the
AND_ERASE_SUBSECTOR: return;if( LS->yD[3U]V__ipleDfi eeeeeeeeeeeeo*)0xF11 q=ubs)
NumbSP; eeeeeeeeeeeeo*)0xF11 qPEB; eeeeeeeeeeeeo*)0xF11 qdr, Offset return; breq=ubs)
NumbSPI= le32toh( -A->pqArgs[0]); return; breif(q=ubs)
NumbSPI>= LS->tV__ipleDD[3U]Args.qNum=ubs)
s)i eeeeeeeeeeeeeeee RA->qErrCode = htole32(ERR_SUBSECTOR?NUMBER); return; bre bre RA->qErrBSP = htole32(0); return; bre}crrr,i eeeeeeeeeeee breqdr, Offset = q=ubs)
NumbSPI* LS->tV__ipleDD[3U]Args.q=ubs)
;
ya; eeeeeeeeeeee breqPEB = qdr, Offset / LS->tV__ipleDD[3U]Args.qPEB;
ya; return; bre breqdr, Offset %= LS->tV__ipleDD[3U]Args.qPEB;
ya; eeeeeeeeeeee bre PEF->rD
Barrier( PEF,CACHE_REGION;PRIV_AREA)iteeeeeeeeeeeeeeee RA->qErrCode = htole32( PEF->rXbirPEB( PEF,qPEB,& RA->qErrBSP, PEF->pPA->pbD
)); eeeeeeeeeeeeeeee RA->qErrBSP = htole32( RA->qErrBSP); eeeeeeeeeeeeeeeeif(le32toh(ERR_NONE) != RA->qErrCodefi eeeeeeeeeeeeeeeeeeee eeeeeeeeeeeeeeee} return; breeeee RA->qErrCode = htole32( PEF->rEr thPEBs( PEF,qPEB,qPEB,& RA->qErrBSP)); eeeeeeeeeeeeeeee RA->qErrBSP = htole32( RA->qErrBSP); eeeeeeeeeeeeeeeeif(le32toh(ERR_NONE) != RA->qErrCodefi eeeeeeeeeeeeeeeeeeee eeeeeeeeeeeeeeee} return; breeeeememseon& PEF->pPA->pbD
[qdr, Offset],00ff, LS->tV__ipleDD[3U]Args.q=ubs)
;
ya); eeeeeeeeeeeeeeee PEF->rD
Barrier( PEF,CACHE_REGION;PRIV_AREA)iteeeeeeeeeeeeeeee RA->qErrCode = htole32( PEF->rWritePEB( PEF,qPEB, PEF->pPA->pbD
,& RA->qErrBSP)); eeeeeeeeeeeeeeee RA->qErrBSP = htole32( RA->qErrBSP); eeeeeeeeeeee}t bre}crrr,i eeeeeeeeeeee RA->qErrCode = htole32(ERR_Dpcon?UNVERIFIED); return; bre RA->qErrBSP = htole32(0); return;}t bre bree the
AND__CMD_SUBSECTOR: return;if( LS->yD[3U]V__ipleDfi eeeeeeeeeeeeo*)0xF11 q=ubs)
NumbSP; eeeeeeeeeeeeo*)0xF11 qPEB; eeeeeeeeeeeeo*)0xF11 qdr, Offset return; breq=ubs)
NumbSPI= le32toh( -A->pqArgs[0]); return; breif(q=ubs)
NumbSPI>= LS->tV__ipleDD[3U]Args.qNum=ubs)
s)i eeeeeeeeeeeeeeee RA->qErrCode = htole32(ERR_SUBSECTOR?NUMBER); return; bre bre RA->qErrBSP = htole32(0); return; bre}crrr,i eeeeeeeeeeee breqdr, Offset = q=ubs)
NumbSPI* LS->tV__ipleDD[3U]Args.q=ubs)
;
ya; eeeeeeeeeeee breqPEB = qdr, Offset / LS->tV__ipleDD[3U]Args.qPEB;
ya; return; bre breqdr, Offset %= LS->tV__ipleDD[3U]Args.qPEB;
ya; eeeeeeeeeeee bre PEF->rD
Barrier( PEF,CACHE_REGION;PRIV_AREA)iteeeeeeeeeeeeeeee RA->qErrCode = htole32( PEF->rXbirPEB( PEF,qPEB,& RA->qErrBSP, PEF->pPA->pbD
)); eeeeeeeeeeeeeeee RA->qErrBSP = htole32( RA->qErrBSP); eeeeeeeeeeeeeeeeif(le32toh(ERR_NONE) != RA->qErrCodefi eeeeeeeeeeeeeeeeeeee eeeeeeeeeeeeeeee} eeeeeeeeeeeeeeee eeeeeeeeeeee bre PEF->rD
Barrier( PEF,CACHE_REGION;AUX_AREA)it breeeeeeeeeeeeememcpy( PEF->pAA->pbD
,& PEF->pPA->pbD
[qdr, Offset], LS->tV__ipleDD[3U]Args.q=ubs)
;
ya); eeeeeeeeeeee bre PEF->rD
Barrier( PEF,CACHE_REGION;AUX_AREA)it breeeeeeeee}t bre}crrr,i eeeeeeeeeeee RA->qErrCode = htole32(ERR_Dpcon?UNVERIFIED); return; bre RA->qErrBSP = htole32(0); return;}t bre bree the
AND_WRITE_SUBSECTOR: return;if( LS->yD[3U]V__ipleDfi eeeeeeeeeeeeo*)0xF11 q=ubs)
NumbSP; eeeeeeeeeeeeo*)0xF11 qPEB; eeeeeeeeeeeeo*)0xF11 qdr, Offset return; breq=ubs)
NumbSPI= le32toh( -A->pqArgs[0]); return; breif(q=ubs)
NumbSPI>= LS->tV__ipleDD[3U]Args.qNum=ubs)
s)i eeeeeeeeeeeeeeee RA->qErrCode = htole32(ERR_SUBSECTOR?NUMBER); return; bre bre RA->qErrBSP = htole32(0); return; bre}crrr,i eeeeeeeeeeee bre PEF->rD
Barrier( PEF,CACHE_REGION;AUX_AREA)it eeeeeeeeeeee breqdr, Offset = q=ubs)
NumbSPI* LS->tV__ipleDD[3U]Args.q=ubs)
;
ya; eeeeeeeeeeee breqPEB = qdr, Offset / LS->tV__ipleDD[3U]Args.qPEB;
ya; return; bre breqdr, Offset %= LS->tV__ipleDD[3U]Args.qPEB;
ya; eeeeeeeeeeee bre PEF->rD
Barrier( PEF,CACHE_REGION;PRIV_AREA)iteeeeeeeeeeeeeeee RA->qErrCode = htole32( PEF->rXbirPEB( PEF,qPEB,& RA->qErrBSP, PEF->pPA->pbD
)); eeeeeeeeeeeeeeee RA->qErrBSP = htole32( RA->qErrBSP); eeeeeeeeeeeeeeeeif(le32toh(ERR_NONE) != RA->qErrCodefi eeeeeeeeeeeeeeeeeeee eeeeeeeeeeeeeeee} return; breeeee RA->qErrCode = htole32( PEF->rEr thPEBs( PEF,qPEB,qPEB,& RA->qErrBSP)); eeeeeeeeeeeeeeee RA->qErrBSP = htole32( RA->qErrBSP); eeeeeeeeeeeeeeeeif(le32toh(ERR_NONE) != RA->qErrCodefi eeeeeeeeeeeeeeeeeeee eeeeeeeeeeeeeeee} return; breeeeememcpy(& PEF->pPA->pbD
[qdr, Offset], PEF->pAA->pbD
, LS->tV__ipleDD[3U]Args.q=ubs)
;
ya); eeeeeeeeeeee bre PEF->rD
Barrier( PEF,CACHE_REGION;PRIV_AREA)itteeeeeeeeeeeeeeee RA->qErrCode = htole32( PEF->rWritePEB( PEF,qPEB, PEF->pPA->pbD
,& RA->qErrBSP)); eeeeeeeeeeeeeeee RA->qErrBSP = htole32( RA->qErrBSP); eeeeeeeeeeee}t bre}crrr,i eeeeeeeeeeee RA->qErrCode = htole32(ERR_Dpcon?UNVERIFIED); return; bre RA->qErrBSP = htole32(0); return;}t bre bree the
AND_SIM_STOP: return; RA->qErrCode = htole32(ERR_NONE); eeeeeeee RA->qErrBSP = htole32(0); return;yRet (1farr, bre bre urn;}t ClearCbirte AXSa( ,A. eeee RA->qChecksum
= htole32( eeeeeeeeeeeeeeeeeeeeeeeeeCrc32_ChmpuioBuf( return; breeeeeeeeeeeeeeeeee0, return; breeeeeeeeeeee/sho*)0xF11 inCrc32,t*/turn; breeeeeeeeeeeeeeeeeeeeee RA,eturn; breeeeeeeeeeee/sh malvoid *buf,t*/turn; breeeeeeeeeeeeeeeeeeeeeethi of(Rg peasoAXSa)f-a8e/sho*)0xF11 bufLend*/turn; breeeeeeeeeeeeeeeeee) return; breeeeeeeeee)it bre PEF->rD
Barrier( PEF,CACHE_REGION;RESP_AREA)itt breXST_SU;yRetit}* pan_apps-mini_r5-mymemcpy_strict_(32U)_tested/xbiron/pnt.h 664 0 0 05520 14216660457 24417 0 us.;
root root 0 0 /f fuCopyright 2021-2022 Xilinx, IncfinturnLicensed undSPIsh nApach nLicense,nV__1ile 2.0 (sh n"License");tamayoummayqpot usehshionf= (hexcept flathmpli*
*e DicIsh nLicense.tam YoummayqobtaiUeadcopy flash nLicense atfinturnnnnnhttp://www.apach .org/licenses/LICENSE-2.0finturnUnle wfrequiradicabapplicXQsp lawLf agree fSPIiUeincihmt, softwa*****ndistributed undSPIsh nLicense iondistributed le2Mb "AS IS" BASIS,***nWITHOUT WARRANTIES OR CONDI
.ecS OF ANY KIND, ei iir exp wfr impliad.tam SeeIsh nLicense f sh n ho ipic langur,nngovernamtepeemass
os5te
am limi ae
os5undSPIsh nLicense.tam/
#ifnontIPEF1H__*#ontine PEF1H__*
ntrucQsLoop= XSe;
nitontIntrucQsLoop= XSesLoop= XSe;
ntrucQsProgEnvFboes;
nitontIntrucQsProgEnvFboessProgEnvFboes;
ntrucQsV__ipyD[3U]Args;
nitontIntrucQsV__ipyD[3U]ArgssV__ipyD[3U]Args;
ntrucQsPEFContext;
nitontIntrucQsPEFContextsPEFContext;
ntrucQsV__ipyD[3U]Argsi eeeeo*)0xF11 q>Bnbmoe
oirCo; eeeeo*)0xF11 qBusWidic; eeeeo*)0xF11 q_Msg __ipiiralInpuiSpee Hz; eeeeo*)0xF11 qP cal*(; eeeeo*)0xF11 qCach Coh__uppDMA; eeeeo*)0xF11 qPEB;
ya; reto*)0xF11 qNumPEBs; reto*)0xF11 q=ubs)
;
ya; eeeeo*)0xF11 qNum=ubs)
s eeee/shInferradi*/t};*
ntrucQsLoop= XSei eeeebool yD[3U]V__ipleD; eeeeo*)0xF11 qCS; eeeeo*)0xF11 qMismatch*/
itt breV__ipyD[3U]ArgsitV__ipyD[3U]ArgsIn bre/shThese areIsh nv__ipleD valuesd*/turn;V__ipyD[3U]ArgsitV__ipleDD[3U]Args breo*)0xF11 pqV__ipyD[3U]Args[8] };*
nitontIenum
CACHE_REGIONi eeeeCACHE_REGION;
_AREA, eeeeCACHE_REGION;RESP_AREA, eeeeCACHE_REGION;AUX_AREA, eeeeCACHE_REGION;PRIV_AREA
}eCACHE_REGION;****turnProvidadicabenvironmnnt (simLf agnnt)turnRST_SU;value f all boee
os5ionERRee ttfSPIaeo*)0xF11tam/
ntrucQsProgEnvFboess eeeeLoop= XSeitLS brePEFContextxt ,ontext;
breSysxt Sys;
breM agnAXSaxt MA; eeeeAuxAXSaxt AA; eeeeAuxAXSaxt PA brevoid (*rD
Barrier)( return;ProgEnvFboesxt PEF, return;CACHE_REGIONieCach Reg
o return;); eeeeo*)0xF11 (*rV__ipyD[3U])( return;ProgEnvFboesxt PEF, return;OUTPUT_PARAMETERevolae
sp o*)0xF11xt qErrBSP return;); eeeeo*)0xF11 (*rEr thPEBs)( return;ProgEnvFboesxt PEF, return;o*)0xF11 qPEB;.;
, return;o*)0xF11 qPEBEe , return;OUTPUT_PARAMETERevolae
sp o*)0xF11xt qErrBSP return;); eeeeo*)0xF11 (*rXbirPEB)( return;ProgEnvFboesxt PEF, return;o*)0xF11 qPEBNumbSP, return;OUTPUT_PARAMETERevolae
sp o*)0xF11xt qErrBSP, return;OUTPUT_PARAMETEReo*)08_txt bDst return;); eeeeo*)0xF11 (*rWritePEB)( return;ProgEnvFboesxt PEF, return;o*)0xF11 qPEBNumbSP, return; malo*)08_txt bSrc, return;OUTPUT_PARAMETERevolae
sp o*)0xF11xt qErrBSP return;); eeeeo*)0xF11 (*rGetMultibootdr, s)( return;ProgEnvFboesxt PEF, return;OUTPUT_PARAMETERevolae
sp o*)0xF11xt qErrBSP, return;OUTPUT_PARAMETEReo*)0xF11xt qMultibootdr, s return;); };*
erneSU;void irvoPEF(ProgEnvFboesxt PEF.;
erneSU;bool StepPEF(ProgEnvFboesxt PEF.;**#Sndif /shPEF1H__ */t pan_apps-mini_r5-mymemcpy_strict_(32U)_tested/xbiron/protocol.c 664 0 0 11045 14216660457 25500 0 us.;
root root 0 0 /f fuCopyright 2021-2022 Xilinx, IncfinturnLicensed undSPIsh nApach nLicense,nV__1ile 2.0 (sh n"License");tamayoummayqpot usehshionf= (hexcept flathmpli*
*e DicIsh nLicense.tam YoummayqobtaiUeadcopy flash nLicense atfinturnnnnnhttp://www.apach .org/licenses/LICENSE-2.0finturnUnle wfrequiradicabapplicXQsp lawLf agree fSPIiUeincihmt, softwa*****ndistributed undSPIsh nLicense iondistributed le2Mb "AS IS" BASIS,***nWITHOUT WARRANTIES OR CONDI
.ecS OF ANY KIND, ei iir exp wfr impliad.tam SeeIsh nLicense f sh n ho ipic langur,nngovernamtepeemass
os5te
am limi ae
os5undSPIsh nLicense.tam/
#include "xbiron.h"** malchar*eGetErrStramt(ERReeErr,OUTPUT_PARAMETERechar pcErrStramt[ERR_STRING_BUF _OC].ASa))))switch(eErrfi eeeee theERR_NONE: (void.strncpy( cErrStramt,"ERR_NONE",ERR_STRING_BUF _OC);e urn;e theERR_SEQ: (void.strncpy( cErrStramt,"ERR_SEQ",ERR_STRING_BUF _OC);e urn;e theERR_
AND: (void.strncpy( cErrStramt,"ERR_
AND",ERR_STRING_BUF _OC);e urn;e theERR_BOARD;Dpcon: (void.strncpy( cErrStramt,"ERR_BOARD;Dpcon",ERR_STRING_BUF _OC);e urn;e theERR_PEB?NUMBER: (void.strncpy( cErrStramt,"ERR_PEB?NUMBER",ERR_STRING_BUF _OC);e urn;e theERR_SUBSECTOR?NUMBER: (void.strncpy( cErrStramt,"ERR_SUBSECTOR?NUMBER",ERR_STRING_BUF _OC);e urn;e theERR_ERASE: (void.strncpy( cErrStramt,"ERR_ERASE",ERR_STRING_BUF _OC);e urn;e theERR__CMD: (void.strncpy( cErrStramt,"ERR__CMD",ERR_STRING_BUF _OC);e urn;e theERR_WRITE: (void.strncpy( cErrStramt,"ERR_WRITE",ERR_STRING_BUF _OC);e urn;e theERR_Dpcon?UNVERIFIED: (void.strncpy( cErrStramt,"ERR_Dpcon?UNVERIFIED",ERR_STRING_BUF _OC);e urn;e theERR_PEB? _OC: (void.strncpy( cErrStramt,"ERR_PEB? _OC",ERR_STRING_BUF _OC);e urn;e theERR_SUBSECTOR? _OC: (void.strncpy( cErrStramt,"ERR_SUBSECTOR? _OC",ERR_STRING_BUF _OC);e urn;e theERR_IMAGE_ _OC: (void.strncpy( cErrStramt,"ERR_IMAGE_ _OC",ERR_STRING_BUF _OC);e urn;e theERR_
HECKSUM: (void.strncpy( cErrStramt,"ERR_
HECKSUM",ERR_STRING_BUF _OC);e urn;e theERR_MULTIBOOT;BYTES: (void.strncpy( cErrStramt,"ERR_MULTIBOOT;BYTES",ERR_STRING_BUF _OC);e urn;e theERR_IMAGE_ALIGNMENT: (void.strncpy( cErrStramt,"ERR_IMAGE_ALIGNMENT",ERR_STRING_BUF _OC);e urn;e theERR_BSP: (void.strncpy( cErrStramt,"ERR_BSP",ERR_STRING_BUF _OC);e urn;e theERR_TIMEOUT: (void.strncpy( cErrStramt,"ERR_TIMEOUT",ERR_STRING_BUF _OC);e urn;e theERR_IN NAL: (void.strncpy( cErrStramt,"ERR_IN NAL",ERR_STRING_BUF _OC);e urn;ontaryp: (void.snnriuhf( cErrStramt,ERR_STRING_BUF _OC,"ERR_\?\?\?(0x%08x)",(uns2U)e
int)eErrf;e urn;}t pcErrStramt[ERR_STRING_BUF _OC -l1] = 0; retXST_SU;( malchar*)pcErrStramtit}** malchar*eGetCbirte Stramt(
AND eCbirte ,OUTPUT_PARAMETERechar pcCbirte Stramt[
AND_STRING_BUF _OC].ASa))))switch(eCbirte )i eeeee the
AND_INVALID: (void.strncpy( cCbirte Stramt,"
AND_INVALID",
AND_STRING_BUF _OC);e urn;e the
AND_VERIFY;Dpcon: (void.strncpy( cCbirte Stramt,"
AND_VERIFY;Dpcon",
AND_STRING_BUF _OC);e urn;e the
AND_VERIFY;IMAGE: (void.strncpy( cCbirte Stramt,"
AND_VERIFY;IMAGE",
AND_STRING_BUF _OC);e urn;e the
AND_GET_MULTIBOOT;BYTES: (void.strncpy( cCbirte Stramt,"
AND_GET_MULTIBOOT;BYTES",
AND_STRING_BUF _OC);e urn;e the
AND_ERASE_PEBS: (void.strncpy( cCbirte Stramt,"
AND_ERASE_PEBS",
AND_STRING_BUF _OC);e urn;e the
AND__CMD_PEB: (void.strncpy( cCbirte Stramt,"
AND__CMD_PEB",
AND_STRING_BUF _OC);e urn;e the
AND_WRITE_PEB: (void.strncpy( cCbirte Stramt,"
AND_WRITE_PEB",
AND_STRING_BUF _OC);e urn;e the
AND_ERASE_SUBSECTOR: (void.strncpy( cCbirte Stramt,"
AND_ERASE_SUBSECTOR",
AND_STRING_BUF _OC);e urn;e the
AND__CMD_SUBSECTOR: (void.strncpy( cCbirte Stramt,"
AND__CMD_SUBSECTOR",
AND_STRING_BUF _OC);e urn;e the
AND_WRITE_SUBSECTOR: (void.strncpy( cCbirte Stramt,"
AND_WRITE_SUBSECTOR",
AND_STRING_BUF _OC);e urn;e the
AND_SIM_STOP: (void.strncpy( cCbirte Stramt,"
AND_SIM_STOP",
AND_STRING_BUF _OC);e urn;ontaryp: (void.snnriuhf( cCbirte Stramt,
AND_STRING_BUF _OC,"
AND_\?\?\?(0x%08x)",(uns2U)e
int)eCbirte );e urn;}tt pcCbirte Stramt[
AND_STRING_BUF _OC -l1] = 0; retXST_SU;( malchar*)pcCbirte Stramtit}* pan_apps-mini_r5-mymemcpy_strict_(32U)_tested/xbiron/protocol.h 664 0 0 11250 14216660457 25503 0 us.;
root root 0 0 /f fuCopyright 2021-2022 Xilinx, IncfinturnLicensed undSPIsh nApach nLicense,nV__1ile 2.0 (sh n"License");tamayoummayqpot usehshionf= (hexcept flathmpli*
*e DicIsh nLicense.tam YoummayqobtaiUeadcopy flash nLicense atfinturnnnnnhttp://www.apach .org/licenses/LICENSE-2.0finturnUnle wfrequiradicabapplicXQsp lawLf agree fSPIiUeincihmt, softwa*****ndistributed undSPIsh nLicense iondistributed le2Mb "AS IS" BASIS,***nWITHOUT WARRANTIES OR CONDI
.ecS OF ANY KIND, ei iir exp wfr impliad.tam SeeIsh nLicense f sh n ho ipic langur,nngovernamtepeemass
os5te
am limi ae
os5undSPIsh nLicense.tam/
#ifnontIPROTOCOL1H__*#ontine PROTOCOL1H__**#ontine MAX_PEB? _OC;BYTES (128*1024)*
ntrucQsCbirte AXSa nitontIntrucQsCbirte AXSasCbirte AXSa
ntrucQsRg peasoAXSa nitontIntrucQsRg peasoAXSasRg peasoAXSa
ntrucQsM agnAXSa nitontIntrucQsM agnAXSasM agnAXSa
ntrucQsAuxAXSa nitontIntrucQsAuxAXSasAuxAXSa
nitontIenum
ERRe eeeeERR_NONE = 0, eeeeERR_SEQ, eeeeERR_
AND, eeeeERR_BOARD;Dpcon, eeeeERR_PEB?NUMBER, eeeeERR_SUBSECTOR?NUMBER, eeeeERR_ERASE, eeeeERR__CMD, eeeeERR_WRITE, eeeeERR_Dpcon?UNVERIFIED, eeeeERR_PEB? _OC, eeeeERR_SUBSECTOR? _OC, eeeeERR_IMAGE_ _OC, eeeeERR_
HECKSUM, eeeeERR_MULTIBOOT;BYTES, eeeeERR_IMAGE_ALIGNMENT, eeeeERR_BSP, retERR_TIMEOUT, eeeeERR_IN NAL = 0x7fffffff
}eERR;*#ontineeERR_STRING_BUF _OC 32
erneSU; malchar*eGetErrStramt(ERReeErr,OUTPUT_PARAMETERechar pcErrStramt[ERR_STRING_BUF _OC].;*
nitontIenum
C AND eeeeC AND_INVALID = 0, eeee
AND_VERIFY;Dpcon, eeee
AND_VERIFY;IMAGE, eeee
AND_GET_MULTIBOOT;BYTES, eeee
AND_ERASE_PEBS, eeee
AND__CMD_PEB, eeee
AND_WRITE_PEB, eeee
AND_ERASE_SUBSECTOR, eeee
AND__CMD_SUBSECTOR, eeee
AND_WRITE_SUBSECTOR, eeee
AND_SIM_STOP re/shSimulae
o lelyd*/t}e
AND;*#ontinee
AND_STRING_BUF _OC 32
erneSU; malchar*eGetCbirte Stramt(
AND eCbirte ,OUTPUT_PARAMETERechar pcCbirte Stramt[
AND_STRING_BUF _OC].;*
nitontIenum
C NNECTION;MODE eeeeC NNECTION;MODE_LOWER, eeee
NNECTION;MODE_DUAL_PARALLELt}e
NNECTION;MODE;
*#ontinee
AND_MAX_ARGS ((512-(4*2))/4)*ntrucQsCbirte AXSas{ brevolae
sp o*)0xF11 qCbirte ; brevolae
sp o*)0xF11 pqArgs[
AND_MAX_ARGS]; brevolae
sp o*)0xF11 qChecksum };
*#ontineeFEEDC0DE 0xFEEDC0DE*#ontineeRESPecSE_MAX_DATA ((512-(4*4))/4)*ntrucQsRg peasoAXSas{ brevolae
sp o*)0xF11 qErrCode; brevolae
sp o*)0xF11 qErrBSP; brevolae
sp o*)0xF11 pqD
[RESPecSE_MAX_DATA]; brevolae
sp o*)0xF11 qChecksum breo*)0xF11 qFEEDC0DE;t};*
ntrucQsM agnAXSas eeeeCbirte AXSastCbirte AXSa breRg peasoAXSastRg peasoAXSa breo*)0xF11 pqRg erved[(3*1024)/4];t};*
ntrucQsAuxAXSas eeeeo*)0811 pbD
[MAX_PEB? _OC;BYTES];t};*
/f fuEa omR5 has5t TCM.uEa omTCM ion128K,ndividadi*)0o A5te B, ea om64K.tam R5 local add wspace:turnnTCM A ion64K@0x0, wh
sp Bacs atn64K@0x2 0.tam INOTE:hThe R5 local add wspace has5t hosp d00 00x1 0fSPI0x2 0.tamtam The R5s cMb be ru. iUelock-step; split mode.tam The global b theadd wcs 0xFFE0_ 0fiU;botom ths, butIsh nlocae
ostam fla{A,B}{0,1} vary b thd le2mode, as5showb below.tamtam TCM global add wmap f ref__upce (TRM, tXQsp 56):turnSplit:turnnnnn A0 0 -- r5 #0turnnnnn B0 2 -- r5 #0 => Sync wordacs atnFFE2F3FCturnnnnn A1nnnnn 9 -- r5 #1turnnnnn B1nnnnn B -- r5 #1turturnLockstep:turnnnnn A0 0 -- a72 #0turnnnnn A1nnnnn 1 -- a72 #0 => Sync wordacs atnFFE1F3FCturnnnnn B0 2 -- a72 #1turnnnnn B1nnnnn 3 -- a72 #1turtam The m agn area f xbirunicae
oe DicIsh nPCIe homalcs 4K (0x1 )icates.turnUnf tunately, its global add w(d00 0PCIe, e.g.) varies b thd le2whe iirturnsh nchomen agnntlcs R5#0 A72#0. When sh nagnntlcs R5#0, we usehshe splitturnmode, o iirwisehwe usehshe lockhd modeturtam Agnntlcs R5#0: (split map)turnnnnnThe area cs placed atnshe ee flaB0 cabshe linkSPIscriptturnnnnnIts local add wcs 0x2F turnnnnnIts global add wcs 0xFFE2F turnAgnntlcs A72#0: (lockhd map)turnnnnnA0 te A1nareIusadicabA72#0turnnnnnThe area cs placed atnshe ee flaA1ncabshe linkSPIscriptturnnnnnIts global add wcs 0xFFE1F turtam The sync wordacs atn o lffset 0x3fce Dicin shatnm agn area.turnAgnntlr5#0: shioncs 0x2F3FCfiU;its local add wspace, 0xFFE2F3FCfglobal.turnAgnntla72#0: Thioncs global add w0xFFE1F3FC.tamtam The x86 homaldoes pot know a-priori wh
omagnntlcs beamteusad. Thustam it has5SPIcheck botomlocae
os f sh n ync code iU;ordSPIso worktam/
/f fuThe lffsetsnareId00 0sh nTCM b th, 0xFFE0_ 0 fuThe TCM lffset inIsh nPCIe BARlcs ho ipiadi*)Ish nboarda figurae
otam/
#ontineeAGENT_MESSAGE_A_CM_OFFSET_A72 0x1F t#ontineeAGENT_MESSAGE_A_CM_OFFSET_R5 0x2F t#ontineeAGENT_AUX_AREA_OFFSET (00fffc 0f-000ffe 0)*#Sndif /shPROTOCOL1H__ */t pan_apps-mini_r5-mymemcpy_strict_(32U)_tested/xbiron/sys.h 664 0 0 01407 14216660457 24463 0 us.;
root root 0 0 /f fuCopyright 2021-2022 Xilinx, IncfinturnLicensed undSPIsh nApach nLicense,nV__1ile 2.0 (sh n"License");tamayoummayqpot usehshionf= (hexcept flathmpli*
*e DicIsh nLicense.tam YoummayqobtaiUeadcopy flash nLicense atfinturnnnnnhttp://www.apach .org/licenses/LICENSE-2.0finturnUnle wfrequiradicabapplicXQsp lawLf agree fSPIiUeincihmt, softwa*****ndistributed undSPIsh nLicense iondistributed le2Mb "AS IS" BASIS,***nWITHOUT WARRANTIES OR CONDI
.ecS OF ANY KIND, ei iir exp wfr impliad.tam SeeIsh nLicense f sh n ho ipic langur,nngovernamtepeemass
os5te
am limi ae
os5undSPIsh nLicense.tam/
#ifnontISYS1H__*#ontine SYS1H__*
ntrucQsSys;
nitontIntrucQsSyssSys;
/f DummymmacrofSPImark outputIparamet__1IiUe boee
os5m/
#ontineeOUTPUT_PARAMETER
*#Sndif /shSYS1H__ */t pan_apps-mini_r5-mymemcpy_strict_(32U)_tested/deploymnnt_scripts/ 0775 0 0 0 0 14216660457 26131 5 us.;
root root 0 0 pan_apps-mini_r5-mymemcpy_strict_(32U)_tested/deploymnnt_scripts/ronitor_pc.pl 0775 0 0 07454 14216660457 30654 0 us.;
root root 0 0 #! /usr/bin/pnrl -w
#
#uCopyright 2021-2022 Xilinx, Incf#
#uLicensed undSPIsh nApach nLicense,nV__1ile 2.0 (sh n"License");t#ayoummayqpot usehshionf= (hexcept flathmpli*
*e DicIsh nLicense.t# YoummayqobtaiUeadcopy flash nLicense atf#
#unnnnhttp://www.apach .org/licenses/LICENSE-2.0f#
#uUnle wfrequiradicabapplicXQsp lawLf agree fSPIiUeincihmt, softwa***#ndistributed undSPIsh nLicense iondistributed le2Mb "AS IS" BASIS,*#nWITHOUT WARRANTIES OR CONDI
.ecS OF ANY KIND, ei iir exp wfr impliad.t# SeeIsh nLicense f sh n ho ipic langur,nngovernamtepeemass
os5te
# limi ae
os5undSPIsh nLicense.t#
usehstrict;
usehIO::Sockht::INET;
if($#ARGV != 1)i eeeedi n"U agn: $0 homalelf"
}
mym$homal= $ARGV[0];
mym$elfl= $ARGV[1];
mym$core = -1;
mym$proc = "xx";
mym$prntix = "";
mym$procname = "";
-f "$elf" wfr di n"'$elf' ->ldoes pot exist\n";
if($elfl=~ /_([a-zA-Z0-9]+)[_\-]([01])\.elf$/)i eeee$proc = lc($1); eeee$core = $2it}*if($proc eq "a72")i eeee$prntix = "aarch64-none-elf-"; eeee$procname = "Cortex-A72 #${core}"; }crrrif($proc eq "r5")i eeee$prntix = "armr5-none-eabi-"; eeee$procname = "Cortex-R5 #${core}"; }crrrei eeeedi ("Unknown proc fr f $elf\n")it}*if($core != 0e&& $core != 1)i eeeedi ("Unknown core '$core' f $elf\n")it}*
open(mym$dis,"${prntix}objdump -d \"$elf\"|")ifr di ("dis\n")itmym$oldoff = -1;
mym$oldsym
= '';
mym$off;
mym$sym;
mym%Syms = ()itwh
sp(<$dis>)i eeeeehhmp; eeeeif(/^([0-9a-zA-Z]+)\s+<([a-zA-Z_][a-zA-Z0-9_]+)>:/fi eeeeeeee$off = hex($1); eeeeeeee$sym
= $2iteeeeeeeeif($oldoff >= 0fi eeeeeeeeeeeef (mym$p
= 0, mym$o
= $oldoff;m$o
= 0fi eeeef (mym$p
= 0, mym$o
= $oldoff;m$o
$b} keys(%Syms)))i eeeeeeee$val
= $Syms{$key}; eeeeeeee riuh("$key $val\n")iteeee}t}*
mym$localhoma;
mym$localpo
;
open(mym$fh,'-|',"xsdb -eval
'xsdb erver s.;
t'
)i eeee#>BnbmoefSPIshionXSDB erver usehhomalXilinxVboxVM180402 te po
44895 eeeeehhmp; eeeeif(/^>BnbmoefSPIshionXSDB erver usehhomal([^\s]+) te po
([0-9]+)/fi eeeeeeee$localhoma
= $1; eeeeeeee$localpo
= $2iteeeeeeeelastiteeee}t}* riuh "Conbmoe
mteSPI$localhoma
$localpo
\n";
mym$clian = IO::Sockht::INET->new( return; brePeerAddr => $localhoma, return; brePeerPo
=>
$localpo
, return; breProto =>
'tcp' return;)ifr di ("sock\n")it
$clian ->autoflush()it
mym$coirte ; mym$ p; $coirte = "cBnbmoef-homa
$homa\n";
$clian ->sSnd($coirte )ifr di ($coirte );t# riuh "->l$coirte ";
$clian ->recv($ p,1024);t# riuh "<-m$ p";
if($ p !~ /error/)i eeee$coirte = ".;
getsn-set -f= ter {name =~ \"${procname}\"}\n";
eeee$clian ->sSnd($coirte )ifr di ($coirte );teeee# riuh "->l$coirte ";
eeee$clian ->recv($ p,1024);teeee# riuh "<-m$ p";
}
if($ p !~ /error/)i eeee$coirte = ".;
gets\n";
eeee$clian ->sSnd($coirte )ifr di ($coirte );teeee# riuh "->l$coirte ";
eeee$clian ->recv($ p,1024);teeee#eeeemym@Th
mts = split('\n',$ p);teeee#f ea ommym$Th
mt (@Th
mts)i eeee#eeee riuh "$Th
mt\n";
eeee#}t}*
if($ p !~ /error/)i eeee$coirte = "rr pc\n";
eeeewh
sp($ p !~ /error/)i eeeeeeee$clian ->sSnd($coirte )ifr di ($coirte );teeeeeeee$clian ->recv($ p,1024);teeeeeeee#eeeeeeee riuh "->l$coirte ";
eeeeeeee# riuh "<-m$ p";
eeeeeeeeehhmpm$ p; eeeeeeeeif($ p =~ /^okayqpc:\s*([0-9a-fA-F]+)/fi eeeeeeeeeeee$off = hex($1); eeeeeeeeeeeemym$wh__u
= $Syms{$off}; eeeeeeeeeeeeif(ontined($wh__u))i eeeeeeeeeeeeeeee riuh "$Syms{$off}\n";
eeeeeeeeeeee}crrr,i eeeeeeeeeeee bre riuh "$off(????)\n";
eeeeeeeeeeee}
eeeeeeee}crrr,i eeeeeeeeeeee riuh $ p; eeeeeeee}teeee}t}*exit(0); pan_apps-mini_r5-mymemcpy_strict_(32U)_tested/hello_app/ 0775 0 0 0 0 14216660457 24145 5 us.;
root root 0 0 pan_apps-mini_r5-mymemcpy_strict_(32U)_tested/hello_app/hello_app.c 664 0 0 02535 14216660457 26261 0 us.;
root root 0 0 /f fuCopyright 2021-2022 Xilinx, IncfinturnLicensed undSPIsh nApach nLicense,nV__1ile 2.0 (sh n"License");tamayoummayqpot usehshionf= (hexcept flathmpli*
*e DicIsh nLicense.tam YoummayqobtaiUeadcopy flash nLicense atfinturnnnnnhttp://www.apach .org/licenses/LICENSE-2.0finturnUnle wfrequiradicabapplicXQsp lawLf agree fSPIiUeincihmt, softwa*****ndistributed undSPIsh nLicense iondistributed le2Mb "AS IS" BASIS,***nWITHOUT WARRANTIES OR CONDI
.ecS OF ANY KIND, ei iir exp wfr impliad.tam SeeIsh nLicense f sh n ho ipic langur,nngovernamtepeemass
os5te
am limi ae
os5undSPIsh nLicense.tam/
#include "agnnt_xbiron.h"*#include "sleep.h"**/* ------------------------------------------------------------------am/
#ontineeNOTHING
iuh maiU(void.ASa))))TRACE_DECL(o*)0xF11,q)itt breWAIT_FOR_PLM_DONE()itt breGrabSysMutex(); eeeeeeeeTRACE_PRINT("%04x: Buildi*)fo: %s %s\n\r",SYS1MUTEX_MASTER_ID,__DATE__,__TIME__) breRgleaseSysMutex(); bre/f m The mutex code h__u
protmoes; mosp riuhsId00 0overlappamt m e.g. twoIparalleli*)s.;
*s flashcs app le2sh ntwoIchomen cores retum/
retuf (TRACE_ASSIGN(q,0);eNOTHING;eNOTHING)i eeeeeeeeGrabSysMutex(); eeeeeeeeeeeeTRACE_PRINT("%04x: %08x\n\r",SYS1MUTEX_MASTER_ID,q++); eeeeeeeeRgleaseSysMutex(); eeeeeeeeusleep(1 0)iteeee}t bre/f m Not ea oed retum/
retu__builihm_un ea oXQsp(); eeeeXST_SU;0it}* pan_apps-mini_r5-mymemcpy_strict_(32U)_tested/multiboot_app/ 0775 0 0 0 0 14216660457 25060 5 us.;
root root 0 0 pan_apps-mini_r5-mymemcpy_strict_(32U)_tested/multiboot_app/multiboot_app.c 664 0 0 02536 14216660457 30110 0 us.;
root root 0 0 /f fuCopyright 2021-2022 Xilinx, IncfinturnLicensed undSPIsh nApach nLicense,nV__1ile 2.0 (sh n"License");tamayoummayqpot usehshionf= (hexcept flathmpli*
*e DicIsh nLicense.tam YoummayqobtaiUeadcopy flash nLicense atfinturnnnnnhttp://www.apach .org/licenses/LICENSE-2.0finturnUnle wfrequiradicabapplicXQsp lawLf agree fSPIiUeincihmt, softwa*****ndistributed undSPIsh nLicense iondistributed le2Mb "AS IS" BASIS,***nWITHOUT WARRANTIES OR CONDI
.ecS OF ANY KIND, ei iir exp wfr impliad.tam SeeIsh nLicense f sh n ho ipic langur,nngovernamtepeemass
os5te
am limi ae
os5undSPIsh nLicense.tam/
#include "agnnt_xbiron.h"*#include "multiboot.h"**/* ------------------------------------------------------------------am/
iuh maiU(void.ASa))))Multiboot= XSeitMultiboot= XSe;a))))Multiboot= XSext MS = &tMultiboot= XSe;at breWAIT_FOR_PLM_DONE()itt breGrabSysMutex(); eeeeeeeeTRACE_PRINT("%04x: Buildi*)fo: %s %s\n\r",SYS1MUTEX_MASTER_ID,__DATE__,__TIME__) breRgleaseSysMutex(); breTRACE(); eeeeirvoMultiboot= XSe(&tMultiboot= XSe); eeeeTRACE();
retuf (;;)i eeeeeeeeSenseMultibootInpuis( MS)itteeeeeeeeif( MS->yMultibootRequest || (PCIE_STATE_DOWN == MS->ePcie= XSe))i eeeeeeeeeeeeTRACE(); eeeeeeeeeeeePerf mMultiboot( MS)iteeeeeeeeeeee__builihm_un ea oXQsp(); eeeeeeeeeeeef (;;)i eeeeeeeeeeeeeeee; eeeeeeeeeeee}t bre} eeeeeeeeTRACE(); eeee} eeeeXST_SU;0it}* pan_apps-mini_r5-mymemcpy_strict_(32U)_tested/pan_uio/ 0775 0 0 0 0 14216660457 23634 5 us.;
root root 0 0 pan_apps-mini_r5-mymemcpy_strict_(32U)_tested/pan_uio/Makef= ( 664 0 0 01133 14216660457 25272 0 us.;
root root 0 0 #
#uCopyright 2021-2022 Xilinx, Incf#
#uLicensed undSPIsh nApach nLicense,nV__1ile 2.0 (sh n"License");t#ayoummayqpot usehshionf= (hexcept flathmpli*
*e DicIsh nLicense.t# YoummayqobtaiUeadcopy flash nLicense atf#
#unnnnhttp://www.apach .org/licenses/LICENSE-2.0f#
#uUnle wfrequiradicabapplicXQsp lawLf agree fSPIiUeincihmt, softwa***#ndistributed undSPIsh nLicense iondistributed le2Mb "AS IS" BASIS,*#nWITHOUT WARRANTIES OR CONDI
.ecS OF ANY KIND, ei iir exp wfr impliad.t# SeeIsh nLicense f sh n ho ipic langur,nngovernamtepeemass
os5te
# limi ae
os5undSPIsh nLicense.t#
obj-m := an_uio.o* pan_apps-mini_r5-mymemcpy_strict_(32U)_tested/pan_uio/do.sh 0775 0 0 01561 14216660457 24600 0 us.;
root root 0 0 #! /usr/bin/env b th
#
#uCopyright 2021-2022 Xilinx, Incf#
#uLicensed undSPIsh nApach nLicense,nV__1ile 2.0 (sh n"License");t#ayoummayqpot usehshionf= (hexcept flathmpli*
*e DicIsh nLicense.t# YoummayqobtaiUeadcopy flash nLicense atf#
#unnnnhttp://www.apach .org/licenses/LICENSE-2.0f#
#uUnle wfrequiradicabapplicXQsp lawLf agree fSPIiUeincihmt, softwa***#ndistributed undSPIsh nLicense iondistributed le2Mb "AS IS" BASIS,*#nWITHOUT WARRANTIES OR CONDI
.ecS OF ANY KIND, ei iir exp wfr impliad.t# SeeIsh nLicense f sh n ho ipic langur,nngovernamtepeemass
os5te
# limi ae
os5undSPIsh nLicense.t#
# Tested le2CentOSnLinuxfrelease 8.3.2011
# If UEFI secur nbootlcs enXQspdIsh nayoumhavefSPIs2U)ayour module
set -x
set -e
sudo yum -yi*)s.;ll \ eeeekernel-devel \ eeeeelfutils-libelf-devel
make -C /usr/src/kernels/$(uname -r) M=$PWD
sudo modprobp o*o
sudo *)smod an_uio.ko* pan_apps-mini_r5-mymemcpy_strict_(32U)_tested/pan_uio/ an_uio.c 664 0 0 06740 14216660457 25441 0 us.;
root root 0 0 // SPDX-License-Identipiar: GPL-2.0f/f fuExamplu
programfSPIshow how SPIusehUIOfSPImapeadPCIe bar fuCopyright (C) 2021-2022, Xilinx, Inc.tamtam Thcs programfionfree softwa**;ayoumcMb radistribute it te /orturnmodify it undSPIsh nteems flash nGNU Geniral PublicnLicenseturnas publishadicabsh nFree Softwa** Foundae
o; ei iir v__1ile 2tam flath nLicense,n (atayour ope
o) tey latir v__1ile.tam tam Thcs programfiondistributed *)Ish nhope shatnit will beIusaful,***nbutIWITHOUT ANY WARRANTY;e DicoutIeve)Ish nimpliad wa*ranty fl***nMERCHANTABILITYn FITNESS FOR A PARTICULAR PURPOSE. SeeIsh ***nGNU Geniral PublicnLicense f more details.tam tam Youmshouldmhavefreceived adcopy flash nGNU Geniral PublicnLicenseturnalomte DicIshcs program; ifqpot,einciefSPIsh nFree Softwa**turnFoundae
o, Inc., 51nFranklin Street,eFificIFloor, Bost o, MA 02110-1301, USA.tam/
/f fuCopyright 2021-2022 Xilinx, IncfinturnLicensed undSPIsh nApach nLicense,nV__1ile 2.0 (sh n"License");tamayoummayqpot usehshionf= (hexcept flathmpli*
*e DicIsh nLicense.tam YoummayqobtaiUeadcopy flash nLicense atfinturnnnnnhttp://www.apach .org/licenses/LICENSE-2.0finturnUnle wfrequiradicabapplicXQsp lawLf agree fSPIiUeincihmt, softwa*****ndistributed undSPIsh nLicense iondistributed le2Mb "AS IS" BASIS,***nWITHOUT WARRANTIES OR CONDI
.ecS OF ANY KIND, ei iir exp wfr impliad.tam SeeIsh nLicense f sh n ho ipic langur,nngovernamtepeemass
os5te
am limi ae
os5undSPIsh nLicense.tam/
/f fuUIOfPANmcMrd driver, heavily b thd le2sh nfollowamtedriver *)Ish nLinuxfsour *etree:turnnnnn drivers/uio/uio_ ip.cfinturnModuleIparamet__mmanipulae
o code, as5illus.rated *)turnnnnn https://devarea.thm/linux-kernel-developmnnt-kernel-module-paramet__1/finturnCentos packr,ns nee ed:turnnnnnkernel-develturnnnnnelfutils-libelf-devel
am/
#include
#include
#include
#include
#include
#include
/mtam Thcs cs sh nBARlusadif xbirunicae
oe DicIsh nagnnttam/
#ontineeAGENT_
_BARllll4*
ntae
ci*)0 an_uio_pci_probp(ntrucQspci_dev *dev,
malntrucQspci_device_id *id.ASa ntrucQsuio_*)fo *i)fo;
*)fo = kz;lloc(sizeof(ntrucQsuio_*)fo), GFP_KERNEL);t ifq(!*)fo)
XST_SU;-ENOMEM;
*fq(pci_enXQsp_device(dev))
goto out_free;
*fq(pci_request_reg
os(dev, " an_uio"))
goto out_disXQsp;
*)fo->mem[0].addr = pci_resour *_s.;
t(dev, AGENT_
_BAR);t ifq(!*)fo->mem[0].addr)
goto out_release;
*)fo->mem[0].size = pci_resour *_len(dev, AGENT_
_BAR);t i)fo->mem[0].mem nit = UIO_MEM_PHYS; eeeei)fo->name = " an_uio";t i)fo->v__1ile = "0.0.1";
*fq(uio_reg
ster_device(&dev->dev, *)fo))
goto out_unmap;
pci_set_drvdaea(dev, *)fo);
XST_SU;0itout_unmap:
out_release:
pci_release_reg
os(dev)itout_disXQsp:
pci_disXQsp_device(dev)itout_free:t kfree (*)fo);
XST_SU;-ENODEVit}*
ntae
civoid an_uio_pci_remove(ntrucQspci_dev *dev.ASa ntrucQsuio_*)fo *i)fo = pci_get_drvdaea(dev);
uio_un eg
ster_device(*)fo);
pci_release_reg
os(dev)it pci_disXQsp_device(dev)itt kfree (*)fo);
}*
ntae
cintrucQspci_device_id an_uio_pci_ids[] = Sa Sa .ve)d = PCI_VENDOR_ID_XILINX,
.device = 0xb03f,
.subve)d = PCI_VENDOR_ID_XILINX,
.subdevice = 0x 07,
},
{ 0, }t};*
ntae
cintrucQspci_driver an_uio_pci_driver = Sa .name = " an_uio",
.id_tXQsp = an_uio_pci_ids,
.probp = an_uio_pci_probp,
.remove = an_uio_pci_remove,t};*
module_pci_driver( an_uio_pci_driver);
MODULE_DEVICE_TABLE(pci, an_uio_pci_ids);
MODULE_LICENSE("GPL v2");
MODULE_AUTHOR("Xilinx, Inc."); pan_apps-mini_r5-mymemcpy_strict_(32U)_tested/prog_app/ 0775 0 0 0 0 14216660457 24011 5 us.;
root root 0 0 pan_apps-mini_r5-mymemcpy_strict_(32U)_tested/prog_app/prog_app.c 664 0 0 02566 14216660457 25775 us.;
root root 0 0 /f fuCopyright 2021-2022 Xilinx, IncfinturnLicensed undSPIsh nApach nLicense,nV__1ile 2.0 (sh n"License");tamayoummayqpot usehshionf= (hexcept flathmpli*
*e DicIsh nLicense.tam YoummayqobtaiUeadcopy flash nLicense atfinturnnnnnhttp://www.apach .org/licenses/LICENSE-2.0finturnUnle wfrequiradicabapplicXQsp lawLf agree fSPIiUeincihmt, softwa*****ndistributed undSPIsh nLicense iondistributed le2Mb "AS IS" BASIS,***nWITHOUT WARRANTIES OR CONDI
.ecS OF ANY KIND, ei iir exp wfr impliad.tam SeeIsh nLicense f sh n ho ipic langur,nngovernamtepeemass
os5te
am limi ae
os5undSPIsh nLicense.tam/
#include "prog_app.h"**void irvoSys(Sys* pSys.ASa))))TRACE(); eeeeagnntirvoPEFH(&pSys->oPEFContext); eeeeTRACE(); eeeeirvoMultiboot= XSe(&pSys->oMultiboot= XSe); eeeeTRACE(); }
iuh maiU(void.ASa))))SysstSys;
eeeeProgEnvFuncs* pPEF;a))))Multiboot= XSext MS;a))))ntae
cio*)0xF11 q;at breWAIT_FOR_PLM_DONE()itt breGrabSysMutex(); eeeeeeeeTRACE_PRINT("%04x: Buildi*)fo: %s %s\n\r",SYS1MUTEX_MASTER_ID,__DATE__,__TIME__) breRgleaseSysMutex(); breTRACE(); eeeeirvoSys(&oSys); eeeeTRACE();
retupPEF = &tSys.oPEFContext.oPEF; eeee MS = &tSys.oMultiboot= XSe;a))))f (q = 0;;q++)i eeeeeeeeSenseMultibootInpuis( MS)itteeeeeeeeif(PCIE_STATE_UP == MS->ePcie= XSe)i eeeeeeeeeeeeif(0 == (q &000ffffff))i eeeeeeeeeeeeeeeeTRACE(); eeeeeeeeeeee} eeeeeeeeeeeeStepPEF(pPEF); eeeeeeee}teeee}teeeeXST_SU;0it}* pan_apps-mini_r5-mymemcpy_strict_(32U)_tested/prog_app/prog_app.h 664 0 0 01503 14216660457 25770 0 us.;
root root 0 0 /f fuCopyright 2021-2022 Xilinx, IncfinturnLicensed undSPIsh nApach nLicense,nV__1ile 2.0 (sh n"License");tamayoummayqpot usehshionf= (hexcept flathmpli*
*e DicIsh nLicense.tam YoummayqobtaiUeadcopy flash nLicense atfinturnnnnnhttp://www.apach .org/licenses/LICENSE-2.0finturnUnle wfrequiradicabapplicXQsp lawLf agree fSPIiUeincihmt, softwa*****ndistributed undSPIsh nLicense iondistributed le2Mb "AS IS" BASIS,***nWITHOUT WARRANTIES OR CONDI
.ecS OF ANY KIND, ei iir exp wfr impliad.tam SeeIsh nLicense f sh n ho ipic langur,nngovernamtepeemass
os5te
am limi ae
os5undSPIsh nLicense.tam/
#ifnontIPROG_APP1H__*#ontine PROG_APP1H__*
#include "agnnt_xbiron.h"*#include "pef_hw.h"*#include "multiboot.h"**ntrucQsSyss{a))))ntrucQsPEFContext oPEFContext;a))))ntrucQsMultiboot= XSeitMultiboot= XSe;a};
*#Sndif /shPROG_APP1H__ */t pan_apps-mini_r5-mymemcpy_strict_(32U)_tested/prog_multiboot_app/ 0775 0 0 0 0 14216660457 26107 5 us.;
root root 0 0 pan_apps-mini_r5-mymemcpy_strict_(32U)_tested/prog_multiboot_app/prog_multiboot_app.c 664 0 0 03132 14216660457 32157 us.;
root root 0 0 /f fuCopyright 2021-2022 Xilinx, IncfinturnLicensed undSPIsh nApach nLicense,nV__1ile 2.0 (sh n"License");tamayoummayqpot usehshionf= (hexcept flathmpli*
*e DicIsh nLicense.tam YoummayqobtaiUeadcopy flash nLicense atfinturnnnnnhttp://www.apach .org/licenses/LICENSE-2.0finturnUnle wfrequiradicabapplicXQsp lawLf agree fSPIiUeincihmt, softwa*****ndistributed undSPIsh nLicense iondistributed le2Mb "AS IS" BASIS,***nWITHOUT WARRANTIES OR CONDI
.ecS OF ANY KIND, ei iir exp wfr impliad.tam SeeIsh nLicense f sh n ho ipic langur,nngovernamtepeemass
os5te
am limi ae
os5undSPIsh nLicense.tam/
#include "prog_multiboot_app.h"**/* ------------------------------------------------------------------am/
void irvoSys(Sys* pSys.ASa))))TRACE(); eeeeagnntirvoPEFH(&pSys->oPEFContext); eeeeTRACE(); eeeeirvoMultiboot= XSe(&pSys->oMultiboot= XSe); eeeeTRACE(); }
iuh maiU(void.ASa))))SysstSys;
eeeeProgEnvFuncs* pPEF;a))))Multiboot= XSext MS;at breWAIT_FOR_PLM_DONE()itt breGrabSysMutex(); eeeeeeeeTRACE_PRINT("%04x: Buildi*)fo: %s %s\n\r",SYS1MUTEX_MASTER_ID,__DATE__,__TIME__) breRgleaseSysMutex(); breTRACE(); eeeeirvoSys(&oSys); eeeeTRACE();
retupPEF = &tSys.oPEFContext.oPEF; eeee MS = &tSys.oMultiboot= XSe;a))))f (;;)i eeeeeeeeSenseMultibootInpuis( MS)itteeeeeeeeif( MS->yMultibootRequest || (PCIE_STATE_DOWN == MS->ePcie= XSe))i eeeeeeeeeeeeTRACE(); eeeeeeeeeeeePerf mMultiboot( MS)iteeeeeeeeeeee__builihm_un ea oXQsp(); eeeeeeeeeeeef (;;)i eeeeeeeeeeeeeeee; eeeeeeeeeeee}
eeeeeeee}crrr,iif(PCIE_STATE_UP == MS->ePcie= XSe)i eeeeeeeeeeeeTRACE(); eeeeeeeeeeeeStepPEF(pPEF); eeeeeeee}teeee}teeeeXST_SU;0it}* pan_apps-mini_r5-mymemcpy_strict_(32U)_tested/prog_multiboot_app/prog_multiboot_app.h 664 0 0 01541 14216660457 32166 us.;
root root 0 0 /f fuCopyright 2021-2022 Xilinx, IncfinturnLicensed undSPIsh nApach nLicense,nV__1ile 2.0 (sh n"License");tamayoummayqpot usehshionf= (hexcept flathmpli*
*e DicIsh nLicense.tam YoummayqobtaiUeadcopy flash nLicense atfinturnnnnnhttp://www.apach .org/licenses/LICENSE-2.0finturnUnle wfrequiradicabapplicXQsp lawLf agree fSPIiUeincihmt, softwa*****ndistributed undSPIsh nLicense iondistributed le2Mb "AS IS" BASIS,***nWITHOUT WARRANTIES OR CONDI
.ecS OF ANY KIND, ei iir exp wfr impliad.tam SeeIsh nLicense f sh n ho ipic langur,nngovernamtepeemass
os5te
am limi ae
os5undSPIsh nLicense.tam/
#ifnontIPROG_MULTIBOOT;APP1H__*#ontine PROG_MULTIBOOT;APP1H__*
#include "agnnt_xbiron.h"*#include "pef_hw.h"*#include "multiboot.h"**ntrucQsSyss{a))))ntrucQsPEFContext oPEFContext;a))))ntrucQsMultiboot= XSeitMultiboot= XSe;a};
*#Sndif /shPROG_MULTIBOOT;APP1H__ */t pan_apps-mini_r5-mymemcpy_strict_(32U)_tested/r5_mini_app/ 0775 0 0 0 0 14216660457 24404 5 us.;
root root 0 0 pan_apps-mini_r5-mymemcpy_strict_(32U)_tested/r5_mini_app/asm_vectors.S 664 0 0 02041 14216660457 27052 0 us.;
root root 0 0 /******************************************************************************
fuCopyright (c) 2014 - 2022 Xilinx, Inc. All rightwfre erved.
fuSPDX-License-Identipiar: MIT
******************************************************************************/
/f fuMinimal code f R5fSPIboot. Takes 32 (002 )icates atnTCM lffset 0.tam/
/f****************************************************************************/
/f*
fu@f= (hasm_vectors.S
*
fuThionf= (hcontaiUs sh ninitial vector tXQsp f sh nCortex R5fproc fr
*
fu
fuMODIFICA
.ec HISTORY:
*
fuV__)))WhonnnnnDXSeiiiiiChanges
* ----- ------- -------- ---------------------------------------------------
* 5.00ee kp 02/10/14 Initial ve_1ile
* 6.0 musiiiii27/07/16 AddadiUnontinedExceptile handler
* 6.3 kp 02/13/17 Addadisuppo
f hMrd floatffu
f
f*****************************************************************************/
.org 0
.text
.globl _vector_tXQsp
.seee
o .vectors, "ax"
_vector_tXQsp:
.L0: b .L0
.L1: b .L1
.L2: b .L2
.L3: b .L3
.L4: b .L4
.L5: b .L5
.L6: b .L6
.L7: b .L7t pan_apps-mini_r5-mymemcpy_strict_(32U)_tested/r5_mini_app/do.sh 664 0 0 01361 14216660457 25343 0 us.;
root root 0 0 #! /usr/bin/env b th
#
#uCopyright 2021-2022 Xilinx, Incf#
#uLicensed undSPIsh nApach nLicense,nV__1ile 2.0 (sh n"License");t#ayoummayqpot usehshionf= (hexcept flathmpli*
*e DicIsh nLicense.t# YoummayqobtaiUeadcopy flash nLicense atf#
#unnnnhttp://www.apach .org/licenses/LICENSE-2.0f#
#uUnle wfrequiradicabapplicXQsp lawLf agree fSPIiUeincihmt, softwa***#ndistributed undSPIsh nLicense iondistributed le2Mb "AS IS" BASIS,*#nWITHOUT WARRANTIES OR CONDI
.ecS OF ANY KIND, ei iir exp wfr impliad.t# SeeIsh nLicense f sh n ho ipic langur,nngovernamtepeemass
os5te
# limi ae
os5undSPIsh nLicense.t#
#uThionscript ionbeamtesour *d, do pot exit
armr5-none-eabi-gcc -chasm_vectors.S
armr5-none-eabi-ldhasm_vectors.o -T r5_0/lscript.ldh-o ${APP1ELF}* pan_apps-mini_r5-mymemcpy_strict_(32U)_tested/r5_mini_app/r5_0/ 0775 0 0 0 0 14216660457 25151 5 us.;
root root 0 0 pan_apps-mini_r5-mymemcpy_strict_(32U)_tested/r5_mini_app/r5_0/lscript.ld 664 0 0 02176 14216660457 27160 0 us.;
root root 0 0 /f fuCopyright 2021-2022 Xilinx, IncfinturnLicensed undSPIsh nApach nLicense,nV__1ile 2.0 (sh n"License");tamayoummayqpot usehshionf= (hexcept flathmpli*
*e DicIsh nLicense.tam YoummayqobtaiUeadcopy flash nLicense atfinturnnnnnhttp://www.apach .org/licenses/LICENSE-2.0finturnUnle wfrequiradicabapplicXQsp lawLf agree fSPIiUeincihmt, softwa*****ndistributed undSPIsh nLicense iondistributed le2Mb "AS IS" BASIS,***nWITHOUT WARRANTIES OR CONDI
.ecS OF ANY KIND, ei iir exp wfr impliad.tam SeeIsh nLicense f sh n ho ipic langur,nngovernamtepeemass
os5te
am limi ae
os5undSPIsh nLicense.tam/
/f fuAdapted d00 0auto genirated bsp linker script fuMinimal script f a ihmy r5 app atIsh nbeginnamteflaTCM iUelockstepnmodetam/
/f Dntine Memories *)Ish nsystemam/
MEMORYASa)))locked_mem : ORIGIN = 0x0, LENGTH = 0x4 0 }
/f Sho ipabsh ndefault entry poiuh SPIsh nprogramfm/
ENTRY(_vector_tXQsp)
/f Dntine sh nseee
os, te wh__u
sh aba_u
mapped *)Imemoryfm/
SEC
.ecSASa.vectors : Sa)))KEEP (*(.vectors))
} >)locked_mem
.fill : Sa))) FILL(0x0)a))) . = ORIGIN(locked_mem) + LENGTH(locked_mem) - 1; eeeeBYTE(0x0)a} >)locked_mem
_ee = .it}* pan_apps-mini_r5-mymemcpy_strict_(32U)_tested/rem_app/ 0775 0 0 0 0 14216660457 23625 5 us.;
root root 0 0 pan_apps-mini_r5-mymemcpy_strict_(32U)_tested/rem_app/rem_app.c 664 0 0 53076 14216660457 25427 us.;
root root 0 0 /f fuCopyright 2021-2022 Xilinx, IncfinturnLicensed undSPIsh nApach nLicense,nV__1ile 2.0 (sh n"License");tamayoummayqpot usehshionf= (hexcept flathmpli*
*e DicIsh nLicense.tam YoummayqobtaiUeadcopy flash nLicense atfinturnnnnnhttp://www.apach .org/licenses/LICENSE-2.0finturnUnle wfrequiradicabapplicXQsp lawLf agree fSPIiUeincihmt, softwa*****ndistributed undSPIsh nLicense iondistributed le2Mb "AS IS" BASIS,***nWITHOUT WARRANTIES OR CONDI
.ecS OF ANY KIND, ei iir exp wfr impliad.tam SeeIsh nLicense f sh n ho ipic langur,nngovernamtepeemass
os5te
am limi ae
os5undSPIsh nLicense.tam/
/f****************************************************************************/
/f*
fu@f= (h rem_app.c
*
fuExamplu
flahow SPIdo runtim(herrormmanr,nmnnt (REM) te alertIsh nPL via EMIO
fuoutput.
fu
fuTh__u
a_u
3 class*s flam r,ns drivamte peee
ve EMIO pins:
fu - "Config Done"nnn-- Level s2U)al memoryfcontroller setupathmpleted errormfree
fu - "ECCnCorreee
o"-- Pulsed s2U)al indicae
mtea s2ngle-bit errormwas; rreeeed
fu - "Fatal Error"nnn-- Level s2U)al indicae
mteserious errormdeteeeed atI
*eeeeeeeeeeeeeeeeeeeeeeeeees.;
t-upaormduramte untim(.
*
fu@pote
m Thcs cs iuhee e fSPIbe2Mb examplu
shatnshouldmb(hexhee e fSPIcoverI
*e ho ipic applicXe
o nee s.
*
fu
fuMODIFICA
.ec HISTORY:
*
fuV__))WhonnnnDXSeiiiiiChanges
* ---- ------ -------- ---------------------------------------------
* 1.00ejtiiiii09/13/21 Firstfrelease.eeirterupt setupamodelspdI
*eeeeeeeeeeeeeeeeeeeeeeaft__mxttcps_iuhr_examplu.c *)Ish nembeddadswfrepo.
f
ff****************************************************************************/
/f**************************** Include F= (s *********************************/
// EnXQsp self-test iuherrupt trigg__1
//#ontine DO_TEST*
#include "agnnt_xbiron.h"*#include "xparamet__1.h"*#include "xntaeu1.h"*#include "xil_exceptile.h"*#include "xncugic.h"*#include "sleep.h"**/************************** Co)s.;
t Dntinie
os5*****************************/
/f
am Dntine how mtey Memoryfcontrollersbsh ndevice has;(regardle wfflau r,n)finturnV__1al 1902ndevice has;4 DDRfcontrollerstam/
#ontineeREM_NUM_CONTROLLERSl4*
/f
am Dntine sh nbitmapeflaENABLEDfcontrollerstam
am Bit[0]
mapsfSPImemoryfcontroller 0.tam ...
am Bit[3]
mapsfSPImemoryfcontroller 3.tamtam Configure sh nbitmapeas nee ed f your applicXe
o.tam/
#ontineeREM_ENABLED_MC_MAPiii0x1 *
/f
am Dntine sh nbitmapeflawhi ommemoryfcontrollersba_u
us2ng botommemoryfchannelstamtam Ea ommemoryfcontrollermmayqopirate *)Is2ngleaormdual-channelamodendepSndimtef)Ish ntam nit flam moryfdevices atta oed. Some flash nerrorms2U)alsba_u
reported le2Mepee-tam channelabasis, te we nee fSPIignore sh nseeoe channelawh nait'sqpot used. tam
am Bit[0]
shouldmb(hset wh namem controller 0 cs iumdual-channelamodetam ...
am Bit[3]
shouldmb(hset wh namem controller 3 cs iumdual-channelamodetam
am Ilash nmem controller isqpot aee
ve via REM_ENABLED_MC_MAP,ash n peee
ve bit h__u
am cs a "don'tmcMre"tam/
#ontineeREM_DUAL_CHANNEL_MAPii0x1 *
/f
am Dntine sh nmasks f incihmtash n peee
ve EMIO bit f ea o ntaeu1 class.tam tam TheeREM_MASK_DATA_3_MSW eg
stermmanipulaees EMIO bits 31:16. tam/
#ontineeREM_GPIO_CFGDONE_MASKi0x1 /* Ass2U)aEMIO bit[16]fSPI'config done'eeeeeeeeeem/
#ontineeREM_GPIO_CECC_MASKiiii0x2 /* Ass2U)aEMIO bit[17]fSPI'correeeXQsp ECCnerrormm/
#ontineeREM_GPIO_FATAL_MASKiii0x4 /* Ass2U)aEMIO bit[18]fSPI'Fatal Error'eeeeeeeeeem/
// EMIO LPD_GPIO Bank 3 ConfigurXe
o eg
sters
#ontineeREM_MASK_DATA_3_MSW 0xFF0B001C /shEMIO Bank 3 uppee 16-bits output egeeeeem/
#ontineeREM_DIRM_3eeeeeeeeee0xFF0B02C4 /shEMIO Bank 3 Direee
oamoden1=output eeeeem/
#ontineeREM_OEN_3eeeeeeeeeee0xFF0B02C8 /shEMIO Bank 3 output enXQspeeeeeeeeeeeeeeeem/
#ontineeREM_UB_PCSR_STATUS_OFFSETe0x8 /shS.;
t-upantaeu1 eg
stermlffset am/
/f fuKey valuefSPIunlock eg
sterse DicIinciefprotmoe
o. Safest SPIassum ntam heeunlock eve)t iongood f onlyea s2nglefprotmoee fSransaoe
o. Thcs codetam manuallyere-locks uponathmpletelabsh nincie.tam/
#ontineeREM_PCSR_KEYe0xF9E8D7C6 *
// Number ifqiuherruptsamonieored f REM
#ontineeREM_NUM_INTSeee1
#ontineeREM_NUM_POLLeee1
#ontineeREM_DATA_TABLE_SZeREM_NUM_INTSe+eREM_NUM_POLL
/f fuMaximum Wait f CALDONE Tim(outIDelayturnnnTheeappropriXSeitim(hcs highlabappicXe
o depSnd;
t on: turnnnnn-- ECCnfill cs enXQspdI potturnnnnn-- m moryf pepdI
urnnnnn-- m moryf izetam Uppee boundathuldmb(ha minute wait iumveryhexhrememcMses m Tim(outIunies: mSnnn--> 3000emeans 3 seeoe s.tam/
#ontineeREM_TIMEOUT_WAIT 3000e
#ontineeREM_SUCCESS 0
#ontineeREM_FAILUREe1
/f*************************** Tnit Dntinie
os5*******************************/
/f
am Per *)herrupt daea tXQsp SPIseore eg
stermb th te lffsets5te nmasks.tam eirte)t ionSPIbe2geniric,nbut, ea o *)herrupt is; mtrucQpdIdiff__untlyturnnsohshioncs sh nuni o fla;ll nee s.tam
am Staeu12MaskMapecs a pee-bit look-upatXQsp nee ed cabsh nUB eg
sterseSPImapturnnsh nfatal errormstaeu1 bits posie
o SPIsh irnmask/enXQsp/disXQsle bits.tam eTh nUB iuherruptsaa_u
contmtrucQpdIveryhoddlab DicIsh nmask/enXQsp/disXQsetam us2ng arbitraryhbit-posie
o1 elae
vefSPIsh nstaeu1/trigg__ eg
sters.tam eUse it ts: Th nvaluefatngive)Ia*ray posie
o (bit posie
o *)Istaeu1 eg
ster)I
urnnnnnnnnnnnnnmapsfShatnstaeu1 SPIsh nbit-number flash nmask/enXQsp/disXQseI
urnnnnnnnnnnnnn eg
ster.tam/
nitontIntrucQsirtDXSaTXQseISa))u16 IRQ; eeu32 BaseAddr[REM_NUM_CONTROLLERS]; eeu32 CEMaskCh0; //nCorreeXQsp ECC eeu32 CEMaskCh1; eeu32 FatalMaskCh0; eeu32 FatalMaskCh1; eeu32 LockOffset;a))u16 IsrOffset; //nstaeu1 n-- wtc a))u16 ItrOffset; //ntrigg__ -- woa))u16 ImrOffset; //nMask rd -- roa))u16 IerOffset; //nenXQspee-- woa//u16 IdrOffset; //ndisXQseI-- wonnn
}sirtDXSaTXQse;
/f****************nMacros;(InlineeFunce
o1) Dntinie
os5*********************/
/************************** Funce
oeProto nits5******************************/
ntae
ci*)0 SetupIuherruptSystem(u16 IntcDeviceID, XScuGic* IntcI)s.;
cePtr);
ntae
civoid REMIuherruptHandler(void* daea);
ntae
ci*)0 CheckDDRirvoStaeu1(void.;
ntae
civoid wrGPIO(u16 enXQsp,)u16 daea);
ntae
civoid UnmaskMCBits(irtDXSaTXQse* RowPtr);
/************************** VariXQseIDntinie
os5*****************************/
ntae
ciirtDXSaTXQseIUBirtDXSa = Sa .IRQnnnnnnnnnn= 178U,a .BaseAddrnnnnn= {e0xF611 0,e0xF628 0,e0xF63F 0,e0xF656 0 }, eeeeeeeeeeeeeeeeeeeeeeeeeeee//nB th tddre wfflaea o controllera .CEMaskCh0nnnn= 0x0, eeeee//nCorreeXQsp ECCI-- nonea .CEMaskCh1nnnn= 0x0, eeeee//nNot ChannelizedI
u .FatalMaskCh0n= 0x1 << 2ee//n*)s.r_uennnnn--> Staeu1 bit[2],nmask bit[0] eeeeeeeeeeeeeeee| 0x1 << 3 //ndata_uennnnnn--> staeu1 bit[3],nmask bit[1] eeeeeeeeeeeeeeee| 0x1 << 6 //nvt_track_errn--> staeu1 bit[6],nmask bit[2] eeeeeeeeeeeeeeee| 0x1 << 7 //nwatchdog_errn--> staeu1 bit[7],nmask bit[3] eeeeeeeeeeeeeeee,
u .FatalMaskCh1n= 0x0, ee//nNot channelized
I
u .LockOffsetnnn= 0x00c,
u .IsrOffsetnnnn= 0x1 0,e// Staeu1 n-- wtc
u .ItrOffsetnnnn= 0x1 4,e// Trigg__ -- woa)).ImrOffsetnnnn= 0x114,e// Mask rd -- roa)).IerOffsetnnnn= 0x118ee//nEnXQspee-- woa};
*
ntae
ciirtDXSaTXQseIMCirtDXSa = Sa .IRQnnnnnnnnnn= 179U,a .BaseAddrnnnnn= {e0xF615 0,e0xF62C 0,e0xF643 0,e0xF65A 0 },a .CEMaskCh0nnnn= e0x3 << 15 ,e// CE[0,1]_ECC:nCorreeeXQsp ECCICH0a .CEMaskCh1nnnn= e0x3 << 17 ,e// CE[0,1]_ECC:nCorreeeXQsp ECCICH1
u .FatalMaskCh0n= e0xFeeeeeeeee//nNSU_FATAL[3:0] eeeeeeeeeeeeeeee| e0x3 << 9eee//nUC[0,1]_ECC:nUncorreeeXQsp ECCnCH0a eeeeeeeeeeeeee| e0x1 << 19eee//nNA_CMD_FATAL: QOS Q errora eeeeeeeeeeeeee| e0x1 << 21eee//nDC_CMD_FATAL: Ch0ncmd Q errora eeeeeeeeeeeeee| e0x1 << 27eee//nDRAM_PARITY_FATAL_0ncmd/addr parity eeeeeeeeeeeeeeee,I
u .FatalMaskCh1n= e0x3 << 13eee//nUC[0,1]_ECC:nUncorreeeXQsp ECCnCH1a eeeeeeeeeeeeee| e0x1 << 23eee//nDC_CMD_FATAL: Ch1ncmd Q errora eeeeeeeeeeeeee| e0x1 << 28eee//nDRAM_PARITY_FATAL_1ncmd/addr parity eeeeeeeeeeeeeeee,
u .LockOffsetnnn= 0x0c,e// Lockeeeeeeeeee
u .IsrOffsetnnnn= 0x14,e// Staeu1 n-- wtc
u .ItrOffsetnnnn= 0x18,e// Trigg__ -- wo a)).ImrOffsetnnnn= 0x1C,e// Mask rd -- ro a)).IerOffsetnnnn= 0x20ee//nEnXQspee-- wo t};*
ntae
ciXScuGic IuherruptController; /shIuherrupt controller i)s.;
ceem/
/f****************************************************************************/
/f*
shIuherrupt hanldSPIitiratesfShroughaea o enXQspdIMemoryfController5te n***ndet__mines *f: turnnn-- tey fatal errorsaa_u
setturnnn-- tey correeeXQsp ECCnerrorwffccurred.tam
am ECCnerrorwfstaeu1 gets5cleared te nsh nEMIO output cs pulsed. tam
am Ila; fatal eve)t ionfound,nsh nEMIO cs asserted untilfre et.tam
am @param daea cs a poiuher SPIsh n*)herrupt daea tXQsp.tam
am @XST_SU;voidtam
am @pote None.tam
amf****************************************************************************/
void REMIuherruptHandler(void* daea) Sa irtDXSaTXQse* RowPtrn= (irtDXSaTXQse*) daea; eeu32 Fatal; eeu32 CorECC; eeu32 Staeu1Regittee//TRACE_PRINT("Iuherrupt firad: %d\n\r", RowPtr->IRQ)itteef (*)0 i=0; i<=REM_NUM_CONTROLLERS; i++)i eeee*fq(0x1 & (REM_ENABLED_MC_MAPi>> i))i e//nIgnore unusadicontrollerstaaaaaaStaeu1Regn= Xil_In32(RowPtr->BaseAddr[i]e+eRowPtr->IsrOffset); eeeeeeFatal n= Staeu1Regn&eRowPtr->FatalMaskCh0; eeeeeeCorECCn= Staeu1Regn&eRowPtr->CEMaskCh0;
eeeeee
u eee//nOnlyecheck agaiUst Channel 1nmask wh nait'sqenXQspdI nfShatnMC
u eee*fq((REM_DUAL_CHANNEL_MAPi>> i) &0001)i eeeeeeeeFatal n|= Staeu1Regn&eRowPtr->FatalMaskCh1; eeeeeeeeCorECCn|= Staeu1Regn&eRowPtr->CEMaskCh1; eeeeee}
u eee*fq(Fatal)i eeeeeeeeTRACE_PRINT("IRQ:%deeeBank:%deeStaeu1 --> Fatal :%08x\n\r",RowPtr->IRQ,i,Fatal); eeeeeeee//nAssertnEMIO Fatal bit eeeeeeeewrGPIO(REM_GPIO_FATAL_MASK,eREM_GPIO_FATAL_MASK)itteeeeeeee//nUnlock Reg
stermAcc n&eclear ISR. PCSR acc ncs onlyegood f a s2ngleteeeeeeee//nSransaoe
o te nsh naitere-locksteeeeeeeeXil_Out32(RowPtr->BaseAddr[i]e+eRowPtr->LockOffset,eREM_PCSR_KEY); eeeeeeeeXil_Out32(RowPtr->BaseAddr[i]e+eRowPtr->IsrOffset, Fatal); eeeeeeeeXil_Out32(RowPtr->BaseAddr[i]e+eRowPtr->LockOffset,e001); eeeeee}
u eee*fq(CorECC)i eeeeeeeeTRACE_PRINT("IRQ:%deeeBank:%deeStaeu1 --> CorECC:%08x\n\r",RowPtr->IRQ,i,CorECC); eeeeeeee//nAssertnEMIO CorreeeXQsp Errormbit eeeeeeeewrGPIO(REM_GPIO_CECC_MASK,eREM_GPIO_CECC_MASK)itteeeeeeee//nUnlock Reg
stermAcc n&eclear ISRteeeeeeeeXil_Out32(RowPtr->BaseAddr[i]e+eRowPtr->LockOffset,eREM_PCSR_KEY); eeeeeeeeXil_Out32(RowPtr->BaseAddr[i]e+eRowPtr->IsrOffset, CorECC); eeeeeeeeXil_Out32(RowPtr->BaseAddr[i]e+eRowPtr->LockOffset,e001); eeeeeeteeeeeeee//nClear EMIO CorreeeXQsp Errormbit eeeeeeeewrGPIO(REM_GPIO_CECC_MASK,e0x0); eeeeee}
eeee}
ee}ttee// Re-enXQspe*)herruptteeXScuGic_EnXQsp(&IuherruptController, RowPtr->IRQ)it}
/f***************************************************************************/
/f*
f
fuThionfunce
oesetups sh nGICn*)herrupt system.
*
fu@param IntcDeviceIDncs sh nunique IDnflash niuherrupt controller
fu@param IntcI)s.;cePtr cs a poiuher SPIsh n*)herrupt controller
f i)s.;
ce.
*
fu@XST_SU REM_SUCCESS *fqsucc ful, o iirwiseeREM_FAILURE.
*
fu@pote None.tf
f****************************************************************************/
ntae
ci*)0 SetupIuherruptSystem(u16 IntcDeviceID,
eeeeXScuGic* IntcI)s.;
cePtr)ASa *)0 Staeu1;
XScuGic_Config* IntcConfig; /shTh nconfigurXe
o paramet__1nflash
*)herrupt controllerem/
/*
shIuitialize sh n*)herrupt controller driver
s/
IntcConfign= XScuGic_LookupConfig(IntcDeviceID);t ifq(NULL == IntcConfig)i XST_SU;REM_FAILURE;t }
Staeu1 = XScuGic_CfgIuitialize(IntcI)s.;
cePtr, IntcConfig,
IntcConfig->CpuBaseAddr );t ifq(Staeu1 !=eREM_SUCCESS)i XST_SU;REM_FAILURE;t }
/*
shConneee sh n*)herrupt controller iuherrupt handler SPIsh nhMrdwa*** shiuherrupt handl2ng logic *)Ish nARMfproc fr.
s/
Xil_ExceptileReg
sterHandler(XIL_EXCEP
.ec_ID_INT,
(Xil_ExceptileHandler) XScuGic_IuherruptHandler,
IntcI)s.;
cePtr);
/*
shEnXQspe*)herrupts *)Ish nARM
s/
Xil_ExceptileEnXQsp();
XST_SU;REM_SUCCESSit}
/f***************************************************************************/
/f*
f
fuItiratefShroughaea o enXQspdIMemoryfController5te nvalidatefSh ninitial
fu'Config Done'Iboot-upantaeu1 thmpleted DicoutIerror.
*
fu@param mape-- bit-mapeindicae
mtewhi ommemoryfcontrollersba_u
aee
ve
*
fu@XST_SU REM_SUCCESS wh na;ll enXQspdIcontrollersb ea o CALDONE s XSei DicoutI
*eeeeeeeeeeeeeeeeeeeeetey errorwffritimimtefut.
fu crrr,:;REM_FAILURE
*
fu@pote None.tf
f****************************************************************************/
ntae
ci*)0 CheckDDRirvoStaeu1(.ASa))u32 rsltitteef (*)0 i=0; i<=REM_NUM_CONTROLLERS; i++)i eeee*fq((0x1 << i) &0REM_ENABLED_MC_MAP)i e//nIgnore unusadicontrollerst
u eee/* eeeeeee* Wait f CALDONE eeeeeee* nnTheeappropriXSeitim(hcs highlabappicXe
o depSnd;
t te ndepSndimtef): eeeeeee* nnnn-- ECCnfill cs enXQspd eeeeeee* nnnn-- m moryf pepdI
ueeeeee* nnnn-- m moryf izetaeeeeee* nUppee boundathuldmb(hoverIanfull minute wait iumexhrememcMses eeeeee*/t
u eeef (*)0 tim(outI=eREM_TIMEOUT_WAIT; tim(outI> 0; tim(out--)i eeeeeeeersltn= Xil_In32(UBirtDXSa.BaseAddr[i]e+eREM_UB_PCSR_STATUS_OFFSET); eeeeeeee*fq(0x10 == (rsltn&00038) )i e eeeeeeeeee//nValidatef(~CALERROR:5n&0CALDONE:4n&0~INCAL:3)n--> Succ !e eeeeeeeeeeTRACE_PRINT("CheckDDRirvoStaeu1 .... Good:fController:%deetim(out=%d\r\n", eeeeeeeeeeeeeeeeeeeeeeei,tim(out); eeeeeeeeeeb eakitteeeeeeee}crrr,iif (rsltn&0002 )i e eeeeeeeeee//nCatch CALERROR:5nsetnn eeeeeeeeeeTRACE_PRINT("CheckDDRirvoStaeu1 .... error: CALERROR asserted\r\n"); eeeeeeeeeeXST_SU;REM_FAILURE;tteeeeeeee}crrr,i{ eeeeeeeeee//nTheetypicXl wait cMse cs: (rsltn&0008)n--> cs INCAL:3 s ill aee
ve? e eeeeeeeeee//nHowever, ;ll o iir failure-to-Shr
vefcMsesfcMnmb(hcaught eeeeeeeeee//n DicIa2geniric geniraletim(out eeeeeeeeeeif (tim(outI== 0)i eeeeeeeeeeeeTRACE_PRINT("CheckDDRirvoStaeu1 .... error: Controller5%detim(defut\r\n",i); eeeeeeeeeeeeTRACE_PRINT("eeeeeUB_PCSR_SATUSn= %x \r\n",rslt); eeeeeeeeeeeeXST_SU;REM_FAILURE;teeeeeeeeee} eeeeeeeeeeusleep(1 ); eeeeeeee}teeeeee}
eeee}
ee}ttee// FailurefcMsesfa_u
explicitlyecoveredn--> cmplicitqsucc eeXST_SU;REM_SUCCESSit}
/f***************************************************************************/
/f*
f
fuWnciefseleee bits olash n16-bit GPIO eg
ster. nUppee 16-bits are sh nmask
fute nlowee 16-bits are sh ndaea valuefappliad f all zeroednmask bits.
*
fu@param enXQspe-- bit-mapeindicae
mtewhi ombits SPIupdate
m @param daea nn-- valuefoladaea toIinciefSPIsh nenXQspdIGPIO bits
*
fu@XST_SU voidt*
fu@pote None.tf
f****************************************************************************/
ntae
civoid wrGPIO(u16 enXQsp,)u16 daea)i eeXil_Out32(REM_MASK_DATA_3_MSW,f(~((u32) enXQsp)) << 16 | (u32) daea);
}
ee
/f***************************************************************************/
/f*
f
fuF sh ngive)I*)herrupt daea,nenXQspeunmaskIsh nbits ola*)herest iuIsh nt* sh n*)herrupt enXQspe eg
ster.t*
fu@param RowPtrn-- poiuher SPI*)herrupt i)fo daea ntrucQ
*
fu@XST_SU voidt*
fu@pote None.tf
f****************************************************************************/
ntae
civoid UnmaskMCBits(irtDXSaTXQse* RowPtr) Sa))u32 UnmaskIMRitteef (*)0 i=0; i<=REM_NUM_CONTROLLERS; i++)i eeee*fq(0x1 & (REM_ENABLED_MC_MAPi>> i))i e//nSkip unusadicontrollerstaaaaaaUnmaskIMRI=eRowPtr->FatalMaskCh0e| eRowPtr->CEMaskCh0;
eeeeee
u eee//nOnlyecheck agaiUst Channel 1nmask wh nait'sqenXQspdI nfShatnMC
u eee*fq((REM_DUAL_CHANNEL_MAPi>> i) &0001)i eeeeeeeeUnmaskIMRI|=eRowPtr->FatalMaskCh1; eeeeeeeeUnmaskIMRI|=eRowPtr->CEMaskCh1; eeeeee}
u eee*fq(Xil_In32(RowPtr->BaseAddr[i]e+eRowPtr->IsrOffset) &0UnmaskIMR)i eeeeeeeeTRACE_PRINT("WARNING: IRQ5%d,nMC5%deal eady has;ISRnbits set:hEnXQsp:%08x vs;ISRn%08x\n\r",0UnmaskIMR, Xil_In32(RowPtr->BaseAddr[i]e+eRowPtr->IsrOffset)); eeeeeeeeteeeeeeeeXil_Out32(RowPtr->BaseAddr[i]e+eRowPtr->LockOffset,eREM_PCSR_KEY); eeeeeeeeXil_Out32(RowPtr->BaseAddr[i]e+eRowPtr->IsrOffset, eUnmaskIMRI ); eeeeeeeeXil_Out32(RowPtr->BaseAddr[i]e+eRowPtr->LockOffset,e001); eeeeee}
#ifontIDO_TRACE eeeeee eeeeeeeeu32 Mask;tteeeeeeeeMask = Xil_In32(RowPtr->BaseAddr[i]e+eRowPtr->ImrOffset); eeeeeeeeTRACE_PRINT("IRQ5%d,nMC5%deeMask pre :%08x \n\r",RowPtr->IRQ,ei,eMask); ee eeeeeeee*fq(~Mask &0UnmaskIMR)i n eeeeeeeeeeTRACE_PRINT("WARNING: IRQ5%d,nMC5%deal eady has;IMRnbits cleared:eMask:%08x vs;%08x\n\r", eeeeeeeeeeeeeeRowPtr->IRQ,ei,eMask,0UnmaskIMR); eeeeeeee}teeeeee}
#SndiftteeeeeeXil_Out32(RowPtr->BaseAddr[i]e+eRowPtr->LockOffset,eREM_PCSR_KEY); eeeeeeXil_Out32(RowPtr->BaseAddr[i]e+eRowPtr->IerOffset, eUnmaskIMRI ); eeeeeeXil_Out32(RowPtr->BaseAddr[i]e+eRowPtr->LockOffset,e001);
#ifontIDO_TRACE eeeeee eeeeeeeeu32 Mask;tteeeeeeeeMask = Xil_In32(RowPtr->BaseAddr[i]e+eRowPtr->ImrOffset); eeeeeeeeTRACE_PRINT("IRQ5%d,nMC5%deeMask post:%08x \n\r",RowPtr->IRQ,ei,eMask); ee eeeeeeee*fq(Mask &0UnmaskIMR)i n eeeeeeeeeeTRACE_PRINT("ERROR: IRQ5%d,nMC5%deIMRnbits pot cleared:eMask:%08x vs;%08x\n\r", eeeeeeeeeeeeeRowPtr->IRQ,ei,eMask,0UnmaskIMR); eeeeeee}teeeee}
#Sndiftteeee}
ee}t}
/f****************************************************************************/
/f*
f
fuMaiUt*
fu@param None
*
fu@XST_SU
fu NevereXST_SUst*
fu@pote Nonetf
f****************************************************************************/
iuh maiU(void.ASa))))WAIT_FOR_PLM_DONE()itt breGrabSysMutex(); eeeeeeeeTRACE_PRINT("%04x: Buildi*)fo: %s %s\n\r",SYS1MUTEX_MASTER_ID,__DATE__,__TIME__) breRgleaseSysMutex(); b/* eee* DXSaTXQseIa*ray cs populaeed first DicI*)herrupts, seeoe lab Dic eee* poll-b thd eg
sters.ee eee* eee* Thcs crudelaballows sh n*)herruptonSPIbe2setupadiff__untly d00 0 eee* sh npoll-b thd eg
stersewhilu
us2ng sh nsame daea ntrucQ
eee* eee* Thus, 0nSPI(REM_NUM_INTSe-1)iiongeniricallyeusadif full-iuherrupt handl2ng eee* mechanisms, te REM_NUM_INTSeSPIee cs poll2ng. eee*/
irtDXSaTXQse DXSaTXQse[REM_DATA_TABLE_SZ]n= {MCirtDXSa,UBirtDXSa};
irtDXSaTXQse* DXSaRow;
*)0 Staeu1;
))u32 rmw; b/* eee* Configure EMIO SPIdr
vefas outputs eee* eee* AGENT-0balsPIutilizesnsh nEMIO -- Thes nconfigurXe
o eg
stersethuld eee* pote)tiallyecoll2ded Dicnsh no iir proc fr'snconfig, so we mutex0 eee* sh n ead-mod-inciefopirat
o.taee* eee* Si
ceesh nset/clear opirat
os are brok naupeinSPIdiff__untn16-bit eee* sub- eg
sters,nsh re'sqpo cssuefwh na;ss2U)2ng sh noutput values laeer. eee*/
GrabSysMutex(); eermw = Xil_In32(REM_DIRM_3); eeXil_Out32(REM_DIRM_3, (REM_GPIO_CFGDONE_MASKi|eREM_GPIO_CECC_MASKi|eREM_GPIO_FATAL_MASK)<<16 | rmw); eermw = Xil_In32(REM_OEN_3); eeXil_Out32(REM_OEN_3, e(REM_GPIO_CFGDONE_MASKi|eREM_GPIO_CECC_MASKi|eREM_GPIO_FATAL_MASK)<<16 | rmw); eeRgleaseSysMutex(); /*
shValidatefSh nmemoryfcontrollersbthmpleted setupaerrormfree "CALDONE" eee* PLM aeeuallyetakes cMre olashcs proc prior SPIreleas2ng PL SPIruo.taee* Thus, si
ceeshiondes2U)acurrently s2U)alsbsh nPL uponaMb error,eit eee* shionroutineecs aeeuallyeredund;
t.taee* Thatnsaid,nwe'll leavefSh ncheck h__u
aonbelt+suspSndersbas a ref__uncetaee* f o iir usehcMsesfshouldmsh ns2U)al2ng bendestined somehw__u
o iir Shan eee* PL.
s/
eeStaeu1 = CheckDDRirvoStaeu1(.;t ifq(Staeu1 ==eREM_SUCCESS)i brewrGPIO(REM_GPIO_CFGDONE_MASK,REM_GPIO_CFGDONE_MASK.;t }crrr,i{ eeeewrGPIO(REM_GPIO_FATAL_MASK,REM_GPIO_FATAL_MASK)itee}
/*
shConneee sh nIntc SPIsh n*)herrupt subsystemasuchfShatn*)herruptoncan shfccur.uThionfunce
oecs applicXe
o ho ipic.
s/
Staeu1 = SetupIuherruptSystem(XPAR_SCUGIC_SINGLE_DEVICE_ID, &IuherruptController);t ifq(Staeu1 !=eREM_SUCCESS)i eeeeTRACE_PRINT("SetupIuherruptSystem ... Errorm\n\r".;t }c
/*
shConneee REMIuherruptHandler SPIsh n*)herrupt controller
s/
eef (*)0 i=0; i Bit %2d -- Expeee hit:%de\n\r",DXSaTXQse[0].IRQ,i,e001 & (~0xE75019F0i>> i) )itt bre//nunlock PCSRt breXil_Out32(DXSaTXQse[0].BaseAddr[0]e+eDXSaTXQse[0].LockOffset,eREM_PCSR_KEY); eeeeXil_Out32(DXSaTXQse[0].BaseAddr[0]e+eDXSaTXQse[0].ItrOffset,e001<> i))i e//nSkip unusadicontrollerstaaaaaaTRACE_PRINT("Examplu
XSCTIincieonSPIfakeaMb ECCncorreeeXQsp o bank %0d:\n\r mwre00%08x 00%08x \r\n mwre00%08x 00%08x\n\r",0i, eeeeeeeeDXSaTXQse[0].BaseAddr[i]e+eDXSaTXQse[0].LockOffset,eREM_PCSR_KEY, eeeeeeeeDXSaTXQse[0].BaseAddr[i]e+eDXSaTXQse[0].ItrOffset,eDXSaTXQse[0].CEMaskCh0.;tt
aaaaaaTRACE_PRINT("Examplu
XSCTIincieonSPIfakeaMnUB fatal o Bank %0d:\n\r mwre00%08x 00%08x \r\n mwre00%08x 00%08x\n\r",0i, eeeeeeeeDXSaTXQse[1].BaseAddr[i]e+eDXSaTXQse[1].LockOffset,eREM_PCSR_KEY, eeeeeeeeDXSaTXQse[1].BaseAddr[i]e+eDXSaTXQse[1].ItrOffset,eDXSaTXQse[1].FatalMaskCh0); eeee} ee}
#Sndife//nDO_TRACE ee
eeTRACE_PRINT("Setupathmplete ... euheramtepoll loop \r\n"); *ee//nPoll sh nstaeu1 eg
sterseShatnRPU/APUecs unXQsp SPIget ten*)herrupt d00 *eewhilu
(1)i eeeef (*)0 i=REM_NUM_INTS; i ${TMP_ME} eeeeeeeeee ${name}_DIR=\$(cd ${maybe_dir}; pwd) eeeeeeeeee ${name}=\${${name}_DIR##*/}tEOF eeeeeeeesour * ${TMP_ME} eeeeeeeerm -f ${TMP_ME} eeeeelse eeeeeeeeDie;"EocaldsE 0775 0 0 0 {.SZeREM Cherrk Cf.pach s.or poikass
flow.icI/quw__unLi/9792702/ erseh-Mrd flo-word-(hovearyh reular-pliad.tunLi
DeCE_PPeeeCntroldname="$1" eeeeeee=$1me="$1" eeeo be=$2 ${maybe_d[ 0eeee} = "oc " ]eeecae <${#PROC_TUNE="-32Uu=c fr-oc -mtune=c fr-oc -march=armv8-a+nofp+nosimd -mut eeeeh res-'}'
"<${#PROC_TUNE="-3arch=armv8-a+nofp+nosimd -fno- oXQsp("<${PROC_TUNE="${PROC_TUNE_A72}"<${PROC_BIF_DOMAIN=fpd<${PROC_BIF_EXSet="${name}=\${${tr zCh1nnnnnnnnnnnnn#include _lndica=eDi-3"<${PROC_COMPILERathEpi*="aarch64hasm_velf-eeeeeemabe_d[ 0eeee} = "r5" ]eeecae <${#PROC_TUNE="-32Uu=c fr-" e-mtune=c fr-" e-march=armv7-r+nofp+idiv -mut eeeeh res-'}'
"<${#PROC_TUNE="-3arch=armv7-r+nofp+idiv -fno- oXQsp("<${PROC_TUNE="${PROC_TUNE_R5}"<${PROC_BIF_DOMAIN=lpd<${PROC_BIF_EXSet=<${PROC_COMPILERathEpi*="ai-ldhasm_vector"<${be_d[ 0o be} = "tam/
/f" ]eeecae <${{{{{o be=eeeee| e0x Cheeeemae;"EocaldsE INTERN errIninitieeeeecho " \' 0eeee}\'M Ch >${be_d[ 0PROC_TUNE} =~ -fno- oXQsp( ]eeeemaybe_dir="${PROC_TUNE="${PROC_TUNE} -DNO_ *fqTINM Ch >${eini "PROC_FULLIR##_SUFFI_FULLPROC_ 0eeee^^}_ 0o be}}"<${eini "PROC_DEBUGIR##USERaDEBUG_ 0o be}}"<${be_d[ *fqsho ipi* =~ ^- ]eeecae <${{{{{ *fqseee_OUTE="ryfna${ *fqsho ipi*}"${name}=\${${ OARDDO_Tho ipi*="-${ *fqsho ipi*}"${name}=\mabe_d[ *fqsho ipi* =~ ^ryfna- ]eeecae <${{{{{ *fqseee_OUTE="${ *fqsho ipi*}"${name}=\${${ OARDDO_Tho ipi*="$(cho "U{ *fqsho ipi*}|nApa-e 's/^ryfna//')"${name}=\mase<${{{{{ *fqseee_OUTE="ryfna-${ *fqsho ipi*}"${name}=\${${ OARDDO_Tho ipi*="-${ *fqsho ipi*}"${name}=\ Cheeeemae;"EocaldsE IECCnCH1a nmask/enXQargu alse*fq[ -d ${may()i eeeeloca_SUFFIXldvaXld{TOP}/toma72se*${may_SUFFI_PROC=ldlocerrRLY=Userboot-upldname="$1" eeef=".b ter mutex.sh" ${maybe_di! eeeeefeeeeecae <${ ${eee:eeefee {.IO cse*fq[ -d ${may(5_MINI_APP=<${ ${eee:eUSERaVIVADO_INSTALLe {.ILUREe/
SEeef}M Ch >${be_dirz $USERa ANSOLE_0"eeeecae <${USERa ANSOLE_0=nCh1nnnnn Ch >${be_dirz $USERaSetupa0"eeeecae <${USERaSetupa0=nCh1nnnnn Ch >${be_dirz $USERaDEBUG_0"eeeecae <${USERaDEBUG_0="-O3 -g0M Ch >${be_dirz $USERa ANSOLE_1"eeeecae <${USERa ANSOLE_1=nCh1nnnnn Ch >${be_dirz $USERaSetupa1"eeeecae <${USERaSetupa1=nCh1nnnnn Ch >${be_dirz $USERaDEBUG_1"eeeecae <${USERaDEBUG_1="-O3 -g0M Chh >${be_di"##USERa ANSOLE_0}"SS)inCh1eeeecae <${UART_FLAGS_0="-DUART_i++)i eee"<${UART_FLAGS_1="eeeeeemabe_di"##USERa ANSOLE_1}"SS)inCh1eeeecae <${UART_FLAGS_0=""<${UART_FLAGS_1="-DUART_i++)i eee"<${UART_FLAGS_1="M CherrPrepareBoardeeTR077pldname="$E} ereeee_SUFFI_ OARDDO_Theeeeeeeeemk 0 eee_SUFFI_ OARDDO_Theeeeeeeeemk 0 e-peee_SUFFI_ OARDDO_Theeee/im phh >${cpeee_SUFFI_PDI}eee_SUFFI_ OARDDO_Theeeeeeeeemk 0 eee_SUFFI_ OARDDO_Theeee/src_PRINTta e-C ..rs.Seee- x86-mym |Tta e-C ee_SUFFI_ OARDDO_Theeee/src_ -x -vSeee-PRINTta e-C ..rs.Seee- clude |Tta e-C ee_SUFFI_ OARDDO_Theeee/src_ -x -vSeee-PRINTcpe../x86-mym/x86-mymeee_SUFFI_ OARDDO_Theeeeeeeeecpe../x86-mym/boards.csveee_SUFFI_ OARDDO_Theeeeeeeeecpe../x86-mym/im p.csveee_SUFFI_ OARDDO_Theeeeeeeeecpe-re../deploy al_.sh eee_SUFFI_ OARDDO_Theeeeeeeeecpe-re../_r5-uioeee_SUFFI_ OARDDO_TheeeeeeeeeeCE_PDoma72 ldname="$1" eeeeeee_tuneme="$1" eeetcl_cmdme="$1" eeetcl_ laeerme="$1" eeexsame="$1" eeeeeeeme="$1" eeeo beme="$1" eeerteme="$1" eeepainclns_0me="$1" eeepainclns_1me="$1" eeepainld me="$1" eeepainld 1me="$1" eeepainoc me="$1" eeepainoc 1me="$1" eeepainltc mme="$pushdi"##_SUFFI_eeee"<${_SUFFI_ *fqshaybe"##_SUFFI_eeee/${ *fqseee_OUTEe"<${_SUFFI_PIfae"##_SUFFI_ *fqshayb} xsct"<${_SUFFI_WORKSPtupe"##_SUFFI_ *fqshayb} WORKSPtup"<${_SUFFI_PLATFORM_cabd="PLATFORM"<${_SUFFI_ OARDDO_Theeee"##_SUFFI_ *fqshayb} oards/bu_##_SUFFI}${ OARDDO_Tho ipi*}"k = Xil_Inx=$(ls * xsa|w.Sel ${name}=\be_di$x -h1e1eeeeemaybe_dir="${ >${_ $_SUFFI_eee: Neicae
fSraXSAflathmelam775 ,ote)n IS""'$x'"${name}=\ Cheeee >${_SUFFI_PIA="$(cho "* xsa)"<${_SUFFI_PIAe"##_SUFFI_eeee/${_SUFFI_PIA}"k = Xil_Inx=$(ls * pdi|egrep -vS'_iad.ynth\ pdi' |w.Sel ${name}=\be_di$x -h1e1eeeeemaybe_dir="${ >${_ $_SUFFI_eee: Neicae
fSraVivado PDIflathmelam775 ,ote)n IS""'$x'"${name}=\ Cheeee >${_SUFFI_PDI="$(ls * pdi|egrep -vS'_iad.ynth\ pdi')"<${_SUFFI_PDI="$#_SUFFI_eeee/${_SUFFI_PDI}"k = Xil_In_SUFFI_ AMPILE_FLAGS="-fno-tested-nituo.tae-fpplicXe
- wh__u
se-fee* - wh__u
se-fno-treeeeXop-e2Mb "AS I-paiterns"<${_SUFFI_LINK_FLAGS="##_SUFFI_ AMPILE_FLAGS} -nolib.SeWl,--gc- wh__u
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flow.i1cI>eee >${_SUFCTmvdo.ee cametrv{rold -eq 1eqsho ir -SUFd ${_dir="${ r -o*****ndalfp+ibs].0xFF0B0-aeeeel.cc a_RRANiR_K_flags a=$(cho "* xsa)
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SEeF >${PROC_BIFlof${${nameEeF{nam ThekRa ANSOL)e_dirROC_BI"$meE"heee\.ld$${_} -Theker-1" eee -}=\${ f "F>>eeee >${_SUFCTmvee_SUFno-te"X$s f "F!= "X+)i eee"<${_} -}=\${ f "F>>eeee >${_SUFCTmvee_Sta e-CScanAndAddF eeeeeeecae <&&I_FULLPROC_ 0eeee^^}_ 0o be}}"<${be_<${PROC_BIF_DOMAIN=_TUNE_A72}"=\$=fpd<${PROC_BIF_EOF >&&I_FULLPROC_ 0eeee^^}_ 0o be}}"<${b INSTALLage="$Theeee/${=ldl="$3 >${b; doplicXe
- ART_FLd0$ xshmoldsE IECCnCMAIName=ioeeee -no${ xshL); doplicXe
- wh___dirROC_BI-pmc_0 xshL/$f >&&I_fheeee.*\.ld$${be_e-CAddApp mme="$pushdi"##sys=ldj5 ME} eeeeeeeee" ei{name}_DIR=\$(csseii{n3me}_DIR=\$(cAIN="ma4be_dir}; pwdfe_dir}; pwdg} eeeeeeeeeaee_elfi#_SUFO${PROC_TUNE="$_SUFd $fae"#plicX#a{maybe_ssAPP,sAPPees ,2APPe>${_,2APPeldsEUA{{{{x,_APPeELF#_SUFO${PROA eeeeaee} ${=ldl=I_FULLPR_dirz $USEReeeeAPPees }/do.shmoldsE IECCnC ;${naeeAPPees }#_SUFFI_ "$1" ee./do.sh IECCnC oeemaybeldname="$1" e"s
flow.icI>eee >${_SUFCTmv" eecametrv{rold -APPe>${_} -}{naamem FFI_PIA= -do.ee -eq 1eqsho ir -sys=ldj -sys=ldjr -tem}{na#PROmpty" ee (*)0 i(C)"v" eecxFF0B0-rold -APPe>${_} h" ${mcxFF0B0w__u
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<${ -APPeldsEUA{{{{xma=$(cho "*F >${{{{{xb IN##_SUFFI_ "ieeee 1me=====FinSAndAddLhekerS" eee ${=ldl=I_FULLPR_dirz ScanAndAddF eeeeAPPees } ${=ldl=I_FULLPR_irz ScanAndAddF eeeeSTALLTheeeee${=ldl=I_FULLPR_irz ScanAndAddF eeeeSTALLage="$Theeee ${=ldl=I_FULLPR_dirz ldloc="cI>eee >${_SUFCTmv-fno"##v-fnoaee_elfeF{TXQsrold -APPeELFL)e_dir ;${naeeSYSTE=J_BOOTees }#_SUFFI_ #9U,ae:ontroelfune=c fr-oc se[0l2ng b0x1 h"teee*ymbola72 hekReeeeeee}{nc****ham r impimame="$1" e$xsa];${name}=\${${fo s XSey<eeSYSTE=J_BIFc " ]eA"$1" " ]e${idireee}#_SUFFI_ rold = IN##_SU- oXQsp( ]}#_SUFFI_ p[0]ee eee_SUFFI_ ${idireee}#_SUFFI_ I_ *"E="$= F_EXSet-_FULLPRIN##_SU- oXTUNE=}#_SUFFI_ I_ *"AS I=eeeaee_elf}_MINIFI_ ${Rdireee}#_SUF${Rdireee}#w.i2FFI_ *"s
flow.i3cI>eeSYSTE=J_DO}
${TE="ryfO_ *fqTINM }objdumpayb -S_Thees ${APPe>${_}.elf > ${APPe>${_}.objdump.txt
${TE="ryfO_ *fqTINM }n 0xsaa ${APPe>${_}.elf > ${APPe>${_}.nm.txt
w.i3_e-CAddSys=ldjP"${ud eeeeeeecae <eeSYSTE=J_BIFc new_bif:
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flow.i2cI>eeSYSTE=J_DO}
ICENSE-2.0f#
#uUnle wfee*-xwfee*-e
Noge= \me="$1" e-dsE SUFFI_A\me="$1" e-REM_U0xffA\me="$1" e-A"$1"eeeSYSTE=J_BIFcA\me="$1" e-loeDXSnc*A\me="$1" e-wME: \me="$1" e-o a=$SYSTE=J_BIN "imeee_SYSTE=J_BIN _ -x -vSeee-PRINTcpe../x86-mym/xP}/tom-pae${TXQsrold -SYSTE=J_BIN ),=ldm,"; hexdumpayn 64ROC=l4/4 "%08X"' nclv/urando.; ldloc=") \me="$>>eeee >${_Se-PRINTcpe../x86-mym/eeer#w.i2FRDDO_ckmymFI_ OARDDeeeeeecae f_PIAe"##_SUF-PRINTcpe../x8clns_1me="$1" eeep/do.sh"FI_ *"s
flow.i >"ecae eeSYSTE=J_BIFc " ]e ;${naeeSYSTE=J_BOOTees }#_SUFpopdFe-CAddSys=ldj {PROC_TUNE_A72}"<${PROC_BIFbem0AIN=_TUNE_A72}bem1=$3"$pushdi"##sys=ldjCh1nnnnys=ldj5 SYSTE=J${SYSTE=J_INDEX}pi*=ldl="$3bem0="$3bem1e ${be_dirz $USLLsetCURLs64.sh " eeepainltc PIAe"##_Sr"v ee_SUFFI_ OARDDO_T
SYSTE=J_INDEXe0
ame=RaDEI-pa${{te"cI>eee >${_SUFCTmv-fnoldloc=bemsloc=${-all"cI>eee >${_SUFCTmv-fno >${ -quiee*{{{-iDi "eee >${_SUFCTm" 2>&1 |teeo >${.e}
epopdF
ame=1"eeeece"##_SUFFI_eeee/${_SoIA* ; doplicX ;${naea- ]eeecae./do.sh IEpopdFdfp+i#O_ckmymFI_ OARDD
%/}te0 pan_apps-mini_r5-mymemcpy_strict_(32U)_tested/scripts/ root d f epa 0 0 161 5 #! /usr/bin/env b th
#
#uCopyright 2021-2022 Xilinx, Incf#
#uLicensed undSPIsh nApach nLicense,nV__1ile 2.0 (sh n"License");t#ayoummayqpot usehshionf= (hexcept flathmpli*
*e ICENSE-2.0f#
#uUnle wfrequiradicabapplp lawLf agree fSPIiUeincihmt, softwa***#ndistributed undSPIsh nLicense iondistributed le2Mb "AS IS" BASIS,*#nWITHOUT WARRANTIES OR CONDI
.ecS OF ANY KIND, ei iir exp wfr impliad.t# SeeIsh nLicense f sh n ho ipic langur,nngovernamtepeemass
os5te
# limi ae
os5undSPIsh nLicense.t#
eadonlyeL_CURLY='{'
eadonlyeR_CURLY='}'
WaSU;()i eeeeecho WARNING: $ME: $*t}
Die;()i eeeeecho $* eeeeecho "U r,n: $ME DESIGN [BUILD_SUFFIX]" eeeeecho "eeeeBuilds all apps agaiUst des2U)af botoma72 te r5fproc frs" eeeeecho "eeeeAppSnds -BUILD_SUFFIX, *fqsho ipi*d,fee*-e
"$1" ee/tools/lawLf /V_CUs/ppli.2LsetCURLs64.sh eeee/src_ 2
Noge= -dsE SUFFI_A-ame" $1cI/q2}/ham cs ptxt
Noge= -dsE SUFFI_A-dumpa$1c-dump_rds.c{name}=\${/q2})F ;${nae2#MAIName=iI-pa*.bi"; doplicXe
- }/tomaime="$1" e"dMsei_A-an0=netrv{SUFFI_-"$1" eeei > ${i}ptxt ||v7-r+idiv dfp+ipopdF%/}te0 root M Ch >${ e 2.664 3265 6377 #! /usr/bin/env b th
#
#uCopyright 2021-2022 Xilinx, Incf#
#uLicensed undSPIsh nApach nLicense,nV__1ile 2.0 (sh n"License");t#ayoummayqpot usehshionf= (hexcept flathmpli*
*e ICENSE-2.0f#
#uUnle wfrequiradicabapplicXQsp lawLf agree fSPIiUeincihmt, softwa***#ndistributed undSPIsh nLicense iondistributed le2Mb "AS IS" BASIS,*#nWITHOUT WARRANTIES OR CONDI
.ecS OF ANY KIND, ei iir exp wfr impliad.t# SeeIsh nLicense f sh n ho ipic langur,nngovernamtepeemass
os5te
# limi ae
os5undSPIsh nLicense.t#
eadonlyeL_CURLY='{'
eadonlyeR_CURLY='}'
WaSU;()i eeeeecho WARNING: $ME: $*t}
Die;()i eeeeecho $* eeeeecho "U r,n: $ME DESIGN [BUILD_SUFFIX]" eeeeecho "eeeeBuilds all apps agaiUst des2U)af botoma72 te r5fproc frs" eeeeecho "eeeeAppSnds -BUILD_SUFFIX, *fqsho ipi*d,fSPIelse eer imeeXop-e eeeallse eee Ch >${be_dirz $US=/tools/lawLf /V_Xop-/ppli.2,fSPR5~INCi-aee workar1nnn;eeelocaldstr
--> sATheke1"eee CONDI
.eeeeel requimme="Ki|e"eeeeni(); iz empty"ARNI+eDXo ods ~INCi-aee
rz $USERaSer5_ aee
#9U, NEON/FP workar1nnn. Re}{nc*s gcc'ssloc=t-iD ro etc_GPeweePatc fp/neeeeeeuimme="Ki|e"eeeeni(); iz empty"ARNI+eDame=1l}" eeebehavioreeeAeeemunmaskc{ud FI_ *fqshac -DI
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"eeeecae <${#PROC_TUNE="-32Uu= -mFI_ *fqshac "
"eeeecae ${_sbsauart_0) ,"eeeS_0="aSetupa1"eeeecae <${_sbsauart_0) ,"eeeS_0="aSetupa1"eeee1ae < #skc{ud #skc{ud #skc{ud #skc{ud #skc{ud #skc{ud #skc{ud #skc{ud #skc{ud
#NSOLE_ FILESIZEcens(65536*17+4096*3+23)
x1 .ee argc,faPtt char* argv[])
${ *fqs ,j;<SaTXOffset,e001 001 fee(pbBuf,((us 8_t)bflo 8) | (us 8_t)b,16 b++ $(jD>S16 ffset,e001 001 Unm16]set,e001 001 roller);t ifq001 001 Unmj]set,e001 001 r $(wF!= DO_TR(s F ,pbBuf,w) ffset,e001 001 pUCCES("DO_TR" -1 001 r j -= w;{ *fq001 r { *fq001 (void)closR(s F herruptC fee(pbId,'A'+i,128 pbId[128]DXSaT dbNI+tf(sCsvF ,"%s,=ldm,%s\n",stNaR(s E Unmc D< 0Offset,e001 pUCCES("open" -1 #MAIName(eDXSaTXQD< 16].ItrOffset,e001 bNI+tf(pcF Name,"%s/p%02x.dat",argv[2], herruptC F DXSopen(pcF Name, Flags,sMod $(s F D< 0Offset,e001 001 pUCCES("open" ${_s%(Offset,e001 001 pUCCES("o ,"%s,=ldm,%s\nTXQse[i])itee}
eeTRACE_PRINT("UnmcrUnmcrUnmcrUnmcrUnmcrUnmcrUnmcrUnmcrUnmcrUnmcrUnmcrUnmcrUnmcrUnmcrUnmcrUnmcr001 001 pUCCES("op2"S("op2"S("op2"S("op2"S("op2"S("op2"S("op2"S("op2"S("op2"S("op2"S("op2"S("op2"S("op2"S("op2"S("op2"S("op2"S("op2"S("op2"S("op2"S("op2"S("op2"S("op2"S("op2"S("op2"S("op2"S("op2"S("op2"S("op2"S("op2"S("op2"S("op2"S("op2"S("op2"S("op2"S("op2"S("op2"S("op2"S("op2 Rp 5 25.apach .org/licenses/LICENSE-2.0f#
#uUnle wfrequiradicabapplicXQsp lawLf agree fSPIiUeincihmt, softwa***#ndistributed undSPIsh nLicense iondistributed le2Mb "AS IS" BASIS,*#nWITHOUT WARRANTIES OR CONDI
.ecS OF ANY KIND, ei iir exp wfr impliad.t# SeeIsh nnnnnnnnnnnnnnnnnnnnnnnnnnnnnnnnnnnnnnnnnnnnnnnnnnnnnnnnnnnnnnnnnnnnnnnnnnnnnnnnnnnnnnnnnnnnnnnnnnnnnnlyeL_CURLY='{'
eadonlyeR_CURLY='}'
WaSU;()i eeeeecho WARNING: $ME: $*t}
Die;()i eeeeecho $* eeeeecho "U r,n: $ME DESIGN [BUILD_SUFFIX]" eeeeecho "eeeeBuilds all apps agaiUst des2U)af botoma72 te r5fproc frs" eeeeecho "eeeeAppSnds -BUILD_SUFFIX, *fqsho ipi*d,fee*-xwfee*-e
[ 0-vS im
[ 0-vScametr_sim_6-mym/xonf= (hexcept flathmpli*
*e Sys=..
PUthmelAbemsrem bempdfxcept flathmpli*
"
Eeecm1e S16 ffsetim, 0, 0, lower, rUn r256, r rUn rrrrrrrrr0n rrrrrrrre oc n Ctenn Ctenn rU024n 3072#t vmk180_lower, 4, 0, lower, r4n r295833313n rrrrrr2 n r0n rrrrrrrre oc n 2048n Ctenn r682n 1364
vck190_lower, 4, 0, lower, r4n r295833313n rrrrrr2 n r0n rrrrrrrre oc n 2048n Ctenn r682n 1364
vmk180_dual, r4n 0n rrdualPaAInlel, 4, r295833313n rrrrrr2 n r0n rrrrrrrr131072, 2048n 8192n rr768n 1oc
vck190_dual, r4n 0n rrdualPaAInlel, 4, r295833313n rrrrrr2 n r0n rrrrrrrr131072, 2048n 8192n rr768n 1oc
eeeeeee2"S("op2"S("op2"S("op2"S("op2"S("op2"S("op2"S(fqshayb}cept flathmpli*
*e Rp 172f#
#unnnnhttp://w11 ICENSE-2.0f#
#uUnle wfrequiradicabapplicXQsp lawLf agree fSPIiUeincihmt, softwa***#ndistributed undSPIsh nLicense iondistributed le2Mb "AS IS" BASIS,*#nWITHOUT WARRANTIES OR CONDI
.ecS OF ANY KIND, ei iir exp wfr impliad.t# SeeIsh nnnnnnnnnnnnnnnnnnnnnnnnnnnnnnnnnnnnnnnnnnnnnnnnnnnnnnnnnnnnnnnnnnnnnnnnnnnnnnnnnnnnnnnnnnnnnnnnnnnnnnlyeL_CURLY='{'
eadonlyeR_CURLY='}'
WaSU;()i eeeeecho WARNING: $ME: $*t}
Die;()i eeeeecho $* eeeeecho "U r,n: $ME DESIGN [BUILD_SUFFIX]" eeeeecho "eeeeBuilds all apps agaiUst des2U)af botoma72 te r5fproc frs" eeeeecho "eeeeAppSnds -BUILD_SUFFIX, *fqsho ipi*d,fee*-xwfee*-e
[ 0-vS im
[ 0-vScametr_sim_6-mym/xonf= (hexcept flathmpli*
*e i_SoIAbep wfr impliad.t# SeeIsh nnnnnnnnnnnnnnnnnnnnnnnnnnnnnnnnnnnnnnnnnnnnnnnnnnnnnnnnnnnnnnnnnnnnnnnnnnnnnnnnnnnnnnnnnnnnnnnnnnnnnnnnnnnnnnnnnnnnnnnnnnnnnnnnnnnnnnnnnnnnnnnnnnnnnnnnnnnnnnnnnnnnnnnnnnnnnnnnnnnnnnnnnnnnnnnnnnnnnnnnnnnnnnnnnnnnnnnnnnnnnnnnnnnnnnnnnnnnnnnnnnnnnnnnnnnnnnnnnnnnnnnnnnnnnnnnnnnnnnnnnnnnnnnnnnnnnnnnnnnnnnnnnnnnnnnnnnnnnnnnnnnnnnnnnnnnnnnnnnnnnnnnnnnnnnnnnnnnnnnnnnn2"S("op2"S("op2"S("op2"S("op2"S("op2"S("op2"S(fqshayb}"S("op2"S("op2"S("op2"S("op2 Rp 257 44 ICENSE-2.0f#
#uUnle wfrequiradicabapplicXQsp lawLf agree fSPIiUeincihmt, softwa***#ndistributed undSPIsh nLicense iondistributed le2Mb "AS IS" BASIS,*#nWITHOUT WARRANTIES OR CONDI
.ecS OF ANY KIND, ei iir exp wfr impliad.t# SeeIsh nlyeL_CURLY='{'
eadonlyeR_CURLY='}'
WaSU;()i eeeeecho WARNING: $ME: $*t}
Die;()i eeeeecho $* eeeeecho "U r,n: $ME DESIGN [BUILD_SUFFIX]" eeeeecho "eeeeBuilds all apps agaiUst des2U)af botoma72 te r5fproc frs" eeeeecho "eeeeAppSnds -BUILD_SUFFIX, *fqsho ipi*d,fee*-xwfee*-e
[ 0-vS im
[ 0-vScametr_sim_6-mym/xonf= (hexcept flathmpli*
*e Sys=..
PUthmelAbemsqseee_OUTEe"<${_SUFFI_PDI="$(ls * pdi|egrep -vS'_iad.ylflam1e #skc{ud #skc{ud #skc{ud #skc{ud #skc{ud #skc{ud #skc{ud #skc{ud #skc{ud
#NSOLE_ FILESIZEcens(65536*17+4096*3+23)
x1 .ee argc,faPtt char* argv[])
${ *fqs ,j;< #sd(pSys.ItrOffset,e0(s E(p,w) ffset,e001 00cE(pALLskcf(pcF E(p,1ame="$1" eayb}yslog(LOG_ nTXQ%s (%d):f",pcPrefix,0cE(p, E(p,1ame="$1" DXSopenv}yslog(LOG_ npcFmt,=p ;
ffse}i" eec#endi>${_} fqsCsvF DXSopen(argv[1],%s",pcPrefix(wF!= DO_TR(s E(p,w) ffset,e001 00cE(pALLskcf(pcF E(p,1ame="$1" eaybDXSopen(argv[1],E(pcF: %s (%d):f",pcE(p, E(p,1ame="$1" DXSopenvDXSopen(argv[1]pcFmt,=p ;
ffseO_TR(s yNL,w) ffset,e001 0DXSopen(argv[1],\ES("DO_TR" DXSopenfflush(argv[1nmcrUnmcrnmcrUnmcrUnmcr001 001 pUCCES("op2"S("op2"S("op2"S("op2"S("op2"S("op2"S("op2"S("op2"S("op2"S("op2"S("op2"S("op2"S("op2"S("op2"S("op2"S("op2"S("op2"S("op2"S("op2"S("op2"S("op2"S("op2"S("op2"S("op2"S("op2"S("oppppppppppppppppppppppppppppppppppppp2"S("op2"S("op2"S("op2"S("op2"S("op2"S("op2"S(fqshayb}pli*
*esvpppppppppppppppppppppppppppppppppppp 144 ("op2"S("op2"S("op2"S("op2"S("op2"S("op2"S("op2"S("op2"S("opppppppppppppppppppppppppppppppppppppppppndSPIsh nLicense iondistribM*qed le2Mb "AS IS" BASIS,*#nWITHOUT WARRANTIES OR CONDI
.ecS OF ANYM*qIND, ei iir exp wfr impliad.t# SeeIsh M*qcense f sssssssssssssssssssssssssssssssssssssssssssssssssssssssssssssssssssssssssssssssssssssssssssssssssssssnlyeR_CURLY='}'
WaSU;()i eeeeecho WARNING: $ME: $*t}
Die;()i eeeeecho $* eeeeecho "U r,n: $ME DESIGN [BUILD_SUFFIX]" eeeeecho "eeeeBuilds all apps agaiUst des2U)af botoma72 te r5fproc frs" eeeeecho "eeeeAppSnds -BUILD_SUFFIX, *fqsho ipi*d,fee*-xwfee*-e
[ 0-vS im
[ 0-vScametr_sim_6-mym/xonf= (hexcept flathmpli*
*e NOTE:foma7nept fla simdg*"s
.gnuc__unLa=$(choe *f bthmho " 0-vExa e:
#r5" pp.bthse[i])AAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAmcrUnmcrUnmcr001 001 pUCCES("op2"S("op2"S("op2"S("op2"S("op2"S("op2"S("op2"S("op2"S("op2"S("op2"S("op2"S("op2"S("op2"S("op2"S("op2"S("op2"S("op2"S("op2"S("op2"S("op2"S("op2"S("op2"S("op2"S("op2"S("op2"S("oppppppppppppp2"S("op2"S("op2"S("op2"S("op2"S("op2"S("op2"S(fqshayb} .e nn pp 251 517 ICENSE-2.0f#
#uUnle wfrequiradicabapplp lawLf agree fSPIiUeincihmt, softwa***#ndistributed undSPIsh nLicense iondistributed le2Mb "AS IS" BASIS,*#nWITHOUT WARRANTIES OR CONDI
.ecS OF ANY KIND, ei iir exp wfr impliad.t# SeeIsh nLiceeeeeeeeeeeeeeeeeeeeeeeeeeeeeeeeeeeeeeeeeeeeeeeeeeeeeeeeeeeeeeeeeeeeeeeeeeeeeeeeeeeeeeeeeeeeeeeeeeeeee='{'
eadoM*qyeR_CURLY='}'
WaSU;()i eeeeecho WARNING: $ME: $*t}
Die;()i eeeM*qcho $* eeeeecho "U r,n: $ME DESIGN [BUILD_SUFFIX]" eeeeecho "eeeeBuilds aM_GPapps agaiUst des2U)af botoma72 te r5fproc frs" eeeeecho "eeeeAM_GSnds -BUILD_SUFFIX, *fqsho ipi*it
#skc{ud #skc{ud #skc{ud #skc{ud #skc{ud #skc{ud #skc{ud #skc{ud #skc{ud #skc{ud
#NSOLE_ FILESIZEcens(65536*17+4096*3+23)
x1 .ee argc,faPtt char* argv[])
${ *fqs ,j;< #sd(pSys.ItrOffset,e0O (pSys,PRINT_="$1_NONL,0]"TEe:f",=p ;
ffseO_TRO (pSys,PRINT_="$1,0]pcFmt,=p ;
ffse}
ffseva_end(=p ;
}
Unmc WarnUSys* pSys, O_CRE(pnma-oc \n",apcFmt,... va_lTUNE=pfset,e0va_strit(ap]pcFmtnmcrUnmO (pSys,PRINT_kc{N, E(p]pcFmt,=p ;
ffseva_end(=p ;
}
Unmc DieUSys* pSys, O_CRE(pnma-oc \n",apcFmt,... va_lTUNE=pfset,e0va_strit(ap]pcFmtnmcrUnmO (pSys,PRINT_DIE, E(p]pcFmt,=p ;
ffseva_end(=p ;
ffse/*F_EX> #UFFId'
/
ffse (-1)rUnmcrUnmcrUnmcr001 001 pUCCES("op2"S("op2"S("op2"S("op2"S("op2"S("op2"S("op2"S("op2"S("op2"S("op2"S("op2"S("op2"S("op2"S("op2"S("op2"S("op2"S("op2"S("op2"S("op2"S("op2"S("op2"S("op2"2"S("op2"S("op2"S("op2"S("op2"S("op2"S("op2"S(fqshayb} .athmpli*
*e 262 20 ("op2"S("op2"S("op2"S("op2"S("op2"S("op2"S("op2"S("op2"S("opppppppppppppppppppppppppppppppppppppppppndSPIsh nLicense iondistribM*qed le2Mb "AS IS" BASIS,*#nWITHOUT WARRANTIES OR CONDI
.ecS OF ANYM*qIND, ei iir exp wfr impliad.t# SeeIsh M*qcense f sssssssssssssssssssssssssssssssssssssssssssssssssssssssssssssssssssssssssssssssssssssssssssssssssssss='{'
eadoM*qyeR_CURLY='}'
WaSU;()i eeeeecho WARNING: $ME: $*t}
Die;()i eeeM*qcho $* eeeeecho "U r,n: $ME DESIGN [BUILD_SUFFIX]" eeeeecho "eeeeBuilds aM_GPapps agaiUst des2U)af botoma72 te r5fproc frs" eeeeecho "eeeeAM_GSnds -BUILD_SUFFIX, *fqsho ipi*it
#skc{ud #skc{ud #skc{ud #skc{ud #skc{ud #skc{ud #skc{ud #skc{ud #skc{ud #skc{ud
#NSOLE_ FILESIZEcens(65536*17+4096*3+23)
x1 .ee argc,faPtt char* argv[])
${ *fqs ,j;< #sd(Sys* pSys $M ILE IsM*qbmcrEn> #sd(Sys* pSys $M Unmc O (Sys* pSys,PRINT eP ,"%, O_CRE(pnma-oc \n",apcFmt,va_lTUNE=p $M Unmc WarnOrDieUSys* pSys,PRINT eP ,"%, O_CRE(pnma-oc \n",apcFmt,va_lTUNE=p $M Unmc Info(Sys* pSys,ma-oc \n",apcFmt,... ffse__atkc{ud __ (( at (XSopen, 2, 3)) $M Unmc M*qbmcrUSys* pSys,ma-oc \n",apcFmt,... ffse__atkc{ud __ (( at (XSopen, 2, 3)) $M Unmc WarnUSys* pSys, O_CRE(pnma-oc \n",apcFmt,... ffse__atkc{ud __ (( at (XSopen, 3, 4)) $M __atkc{ud __((nonmcrUn.ItUnmc DieUSys* pSys, O_CRE(pnma-oc \n",apcFmt,... ffse__atkc{ud __ (( at (XSopen, 3, 4)) $Mc#endi>se/*F PUt_H__qs f sssssssssssssssssssssssssssssssssssssssssssssssssssssssssssssssssssssssssssssssssssssssssssssssssssss2"S("op2"S("op2"S("op2"S("op2"S("op2"S("op2"S(fqshayb}TEe" *"s
fld;Fs.esssssssssssssssssssssssssssss 2717 2 ICENSE-2.0f#
#uUnle wfrequiradicabapplp lawLf agree fSPIiUeincihmt, softwa***#ndistributed undSPIsh nLicense iondistributed le2Mb "AS IS" BASIS,*#nWITHOUT WARRANTIES OR CONDI
.ecS OF ANY KIND, ei iir exp wfr impliad.t# SeeIsh nLiceeeeeeeeeeeeeeeeeeeeeeeeeeeeeeeeeeeeeeeeeeeeeeeeeeeeeeeeeeeeeeeeeeeeeeeeeeeeeeeeeeeeeeeeeeeeeeeeeeeeee='{'
eadoM*qyeR_CURLY='}'
WaSU;()i eeeeecho WARNING: $ME: $*t}
Die;()i eeeM*qcho $* eeeeecho "U r,n: $ME DESIGN [BUILD_SUFFIX]" eeeeecho "eeeeBuilds aM_GPapps agaiUst des2U)af botoma72 te r5fproc frs" eeeeecho "eeeeAM_GSnds -BUILD_SUFFIX, *fqsho ipi*it
#skc{ud #skc{ud #skc{ud #skc{ud #skc{ud #skc{ud #skc{ud #skc{ud #skc{ud #skc{ud
#NSOLE_ FILESIZEcens(65536*17+4096*3+23)
x1 .ee argc,faPtt char* argv[])
${ *fqs ,j;<
fqs iecUnmc PaucrUSys* pSys,fee(32_t* pqTime Ms f(*pqTime Ms{ *fItrOffset,e0*pqTime Ms{-= ruptC usleep(1S OnmcrUnmcrnm
ILE WaitForSyncWordUSys* pSys,fee(32_t qTime Ms fee(32_t qSyncmcrUnmMILEharA #U* pMA;
ffseM*qbmcrUpSys,"%s()",__FFI___nmcrUnmwheee(qTime Ms{ *fItrOffset,e0='{'ffset,e0* Try ILppsmILEhar > #ars"f s{'ffset,e0*/
ffset,e0pMA = (MILEharA #U*)(s/p%02x.dat",argvvvvv fee(pbI*)(((A*"s
D*)pSys->pDev D)->pxM=p /p%02x.dat",argvvvvv+ /p%02x.dat",argvvvvvpSys->pBI->qTCMO"f /p%02x.dat",argvvvvv+ /p%02x.dat",argvvvvvAGENT_MESSAGE_AREA_OFFSET ${ /p%02x.dat",argv ;
ffseO_TRqSync = le32toh(*(voI+eD#skfee(32_t*)&(pMA->tResp;{ rA #U.qFEEDC0DE) ;
ffseO_TR(s FEEDC0DE ==RqSync,w) ffset,e001 0M*qbmcrUpSys,"\tA72: G\me=ync oldl 0x%08x",qSync,
#skc{ud pDev D)->pxM=p /p%02x.dat",argvvvvv+ /p%02x.dat",argvvvvvpSys->pBI->qTCMO"f /p%02x.dat",argvvvvv+ /p%02x.dat",argvvvvvAGENT_MESSAGE_AREA_OFFSET ${ /pR5x.dat",argv ;
ffseO_TRqSync = le32toh(*(voI+eD#skfee(32_t*)&(pMA->tResp;{ rA #U.qFEEDC0DE) ;
ffseO_TR(s FEEDC0DE ==RqSync,w) ffset,e001 0M*qbmcrUpSys,"\tA72: GR5=ync oldl 0x%08x",qSync,
#skc{ud #UFFId'
/
ffse (-mcrUnmc b kplicXUnmc P_t qSyncmIssueCee-CAdAndrSynpSys,fee(32rA #U* pMA;
ffs2_t qTime Ms fee(32_t qSyncmcRet ;{ *fqsMod Cee-CAdS001 f[COMMAND_STP ,G_BUF;{ *_IWUXSa#skfee(32_t*)&(pM qCcm1eeM*qbmcqCcm1emcrCcm1e_Cees* eBuf2x.dat",argvvvvv f rrrrrrrr1310722222222> #_t*)&(pM inCcm1e,set,e0pMA = &Resp;{Cee-CAdAMA;,22222> # \n",aaucrU*buf,set,e0pMA = of(Cee-CAdAMA;) - 42> #_t*)&(pM bufLenset,e0pMA = se/*F_EX> ,e0pMA*foma7n,e0pMA*f livear > #ars"f UCCES("oacI+e.h> UIO ; /
fcksfsekc{ .,e0pMA*f vUpSys, , 3, a72 tlookFIX0iM ftvF ;{gnuc__hasoacI+e.h> $(chwipgcc v1scrie0pMA*f us, po",aO ; /
fcksfse ftvF ;{, 3, 4ie0pMA*/*qbmcrUpSys,"%s()",__FF%d):fqSynfqSynfqSynfqSynfqSynfqSynfqSynfqSynffse qSync,/p%02x.dat",W__nmcrUn,ud #_t*)&(pM inCcm1e,set,e0pMA = &Resp;{ rA #U.qFEED rrrrrrr> # \n",aaucrU*buf,set,e0pMA = of( rA #U.qFEED) - 82222> #_t*)&(pM bufLenset,e0pMA = 2x.dat",argvset,e001 00cE(pALesp;{ rA #U.qFEEDC0C
fcksfs ^= ~0 /p%02x.dat",WcRet2toh(*(voI+Lesp;{ rA #U.qFEEDC0ErrC!= DO_TR(s
ffset,e02APPeP D< 0p,w Ms{ *fItrOffset,e0='{'ffffffSys* p\tA72& Ms PPeP D< 0{/p%02x.dat",WcRet2toERR_TIME{udO_TR(s
ffset,e02APPeP b++rUpSys,"\tA72: G-> %uc,
RetUnmcrUnmcrUnmccRet _t*)&(pM rUpifyFlash2x.datSys,fee(32ee(32_t qSyncmcCtuo $, busWiee(32_t qSyncmcBh, QspiPee(32_t qSyncmc=eeeeAInSpeptHIns* z, QspiBee(32_t qSyncmcPZEccaler2ee(32_t qSyncmcCeeAentDMA PEBS$Bee(32_t qSyncmcPsNumPEBee(32_t qSyncmcs SubseBee(32_t qSyncmces=S${_sPEBO"Bee(32_H__qs PARAMETER _t* pqTime ErrBS fee(32rA #U* pMA;
ffseMe(32(pnmampl;ee(32_t qSyncmcRet *qbmcrUpSys,"%s()",__F%u,%u,%u,%u,%u,%u,%u,%u,%p)c,/p%02x.dat",W__nmcrUn,ud p ErrBS ResLEharA #U*)(s/p%0__FFI___n Resp;{Cee-CAdAMA;.qCee-CAdmcrhtoh(*((COMMAND_VERIFY_FLASHmffsIsM*mplUCCES("o _esp;{Cee-CAdAMA;.pqmpli[*mpl++]mcrhtoh(*((qCtuo $, busW Resp;{Cee-CAdAMA;.pqmpli[*mpl++]mcrhtoh(*((qBh, Qspi Resp;{Cee-CAdAMA;.pqmpli[*mpl++]mcrhtoh(*((q=eeeeAInSpeptHIns* z, Qspi Resp;{Cee-CAdAMA;.pqmpli[*mpl++]mcrhtoh(*((qPZEccaler Resp;{Cee-CAdAMA;.pqmpli[*mpl++]mcrhtoh(*((qCeeAentDMA PEBS$ Resp;{Cee-CAdAMA;.pqmpli[*mpl++]mcrhtoh(*((qPsNumPE Resp;{Cee-CAdAMA;.pqmpli[*mpl++]mcrhtoh(*((qs Subse Resp;{Cee-CAdAMA;.pqmpli[*mpl++]mcrhtoh(*((qes=S${_sPEBO"se/*F_EXcRet2toIssueCee-CAdAndrSynp%s()"ffs2TIME{ud_VERIFY_FLASHmffsIsM*p ErrBS 2toh(*(voI+Lesp;{ rA #U.qFEEDC0ErrBS UnmcrUnmcrUnmccRet _t*)&(pM rUpifyIesvp2x.datSys,fee(32ee(32_t qSyncmcIesvp, ..nn-ee(32_t qSyncmcIesvpumPEBee(32_t qSyncmcIesvpC
fcksfsBee(32_H__qs PARAMETER _t* pqTime ErrBS fee(32rA #U* pMA;
ffseMe(32_t qSyncmcRet *qbmcrUpSys,"%s()",__F%u,%u,%uFI___nmcrUn,cIesvp, ..nn-cIesvpumPEBcIesvpC
fcksfs ResLEharA #U*)(s/p%0__FFI___n Resp;{Cee-CAdAMA;.qCee-CAdmcrhtoh(*((COMMAND_VERIFY_ D< Resp;{Cee-CAdAMA;.pqmpli[0]mcrhtoh(*((qIesvp, ..nn Resp;{Cee-CAdAMA;.pqmpli[1]mcrhtoh(*((qIesvpumPE Resp;{Cee-CAdAMA;.pqmpli[2]mcrhtoh(*((qIesvpC
fcksfs *F_EXcRet2toIssueCee-CAdAndrSynp%s()"ffs2TIME{ud_VERIFY_ D< *p ErrBS 2toh(*(voI+Lesp;{ rA #U.qFEEDC0ErrBS UnmcrUnmcrUnmccRet _t*)&(pM GetMulti << Bytes2x.datSys,fee(32ee(32_H__qs PARAMETER _t* pqTime ErrBS 2ee(32_H__qs PARAMETER _t* pqTime Multi << Bytes fee(32rA #U* pMA;
ffseMe(32_t qSyncmcRet *qbmcrUpSys,"%s()",__F%pFI___nmcrUn,Unmcr->p Multi << Bytes ResLEharA #U*)(s/p%0__FFI___n Resp;{Cee-CAdAMA;.qCee-CAdmcrhtoh(*((COMMAND_GET_MULTIBOOT_BYTES qRet2toIssueCee-CAdAndrSynp%s()"ffs2TIME{ud_GET_MULTIBOOT_BYTES *p ErrBS 2toh(*(voI+Lesp;{ rA #U.qFEEDC0ErrBS UnmcrUn*p Multi << Bytes2toh(*(voI+Lesp;{ rA #U.qFEEDCpq>pxM 16].ImcrUnmcrUnmccRet _t*)&(pM Eraseubse2x.datSys,fee(32ee(32_t qSyncmcPsNup]pc2ee(32_t qSyncmcPsNEAd,ee(32_H__qs PARAMETER _t* pqTime ErrBS fee(32rA #U* pMA;
ffseMe(32_t qSyncmcRet *qbmcrUpSys,"%s()",__F%u,%uFI___nmcrUn,cPsNup]pc2cPsNEAd ResLEharA #U*)(s/p%0__FFI___n Resp;{Cee-CAdAMA;.qCee-CAdmcrhtoh(*((COMMAND_ERASE_PsNu Resp;{Cee-CAdAMA;.pqmpli[0]mcrhtoh(*((qPsNup]pc Resp;{Cee-CAdAMA;.pqmpli[1]mcrhtoh(*((qPsNEAd qRet2toIssueCee-CAdAndrSynp%s()"ffs2TIME{ud_ERASE_PsN*(qPsNEAd - qPsNup]pccrUn) *p ErrBS 2toh(*(voI+Lesp;{ rA #U.qFEEDC0ErrBS UnmcrUnmcrUnmccRet _t*)&(pM ReadPsNIn_atkal2x.datSys,fee(32ee(32_t qSyncmcPsNN os,ee(32_H__qs PARAMETER _t* pqTime ErrBS fee(32rA #U* pMA;
ffseMe(32_t qSyncmcRet *qbmcrUpSys,"%s()",__F%uFI___nmcrUn,cPsNN os ResLEharA #U*)(s/p%0__FFI___n Resp;{Cee-CAdAMA;.qCee-CAdmcrhtoh(*((COMMAND_READ_PsN Resp;{Cee-CAdAMA;.pqmpli[0]mcrhtoh(*((qPsNN os qRet2toIssueCee-CAdAndrSynp%s()"ffs2TIME{ud_READ_PsN *p ErrBS 2toh(*(voI+Lesp;{ rA #U.qFEEDC0ErrBS UnmcrUnmcrUnmccRet _t*)&(pM ReadPsN2x.datSys,fee(32ee(32_t qSyncmcPsNN os,ee(32_H__qs PARAMETER _t* pqTime ErrBS ,ee(32_H__qs PARAMETER _t* 8Time bDst fee(32_t qSyncmcRet *qbmcrUpSys,"%s()",__F%u,%pFI___nmcrUn,cPsNN os, bDst qRet2toReadPsNIn_atkal2%s()"cPsNN os, 0ErrBS UnmfsIsM*f(ERR_NONSync,wRetU0{/p%02x.da"op2"S( bDst,__FFI__AA,__FFI__CMO"fPsNumPE }ImcrUnmcrUnmccRet _t*)&(pM W%s/pPsNIn_atkal2x.datSys,fee(32ee(32_t qSyncmcPsNN os,ee(32_H__qs PARAMETER _t* pqTime ErrBS fee(32rA #U* pMA;
ffseMe(32_t qSyncmcRet *qbmcrUpSys,"%s()",__F%uFI___nmcrUn,cPsNN os ResLEharA #U*)(s/p%0__FFI___n Resp;{Cee-CAdAMA;.qCee-CAdmcrhtoh(*((COMMAND_WRITE_PsN Resp;{Cee-CAdAMA;.pqmpli[0]mcrhtoh(*((qPsNN os qRet2toIssueCee-CAdAndrSynp%s()"ffs2TIME{ud_WRITE_PsN *p ErrBS 2toh(*(voI+Lesp;{ rA #U.qFEEDC0ErrBS UnmcrUnmcrUnmccRet _t*)&(pM W%s/pPsN2x.datSys,fee(32ee(32_t qSyncmcPsNN os,ee(32 \n",a_t* 8Time bSrc,ee(32_H__qs PARAMETER _t* pqTime ErrBS fee(32rUpSys,"%s()",__F%u,%pFI___nmcrUn,cPsNN os, bSrcUnmcrUn"op2"S( _FFI__AA,_bSrc,__FFI__CMO"fPsNumPE mcrUnmcrUnmcW%s/pPsNIn_atkal2%s()"cPsNN os, 0ErrBS Unm _t*)&(pM Erasees=S${_sP2x.datSys,fee(32ee(32_t qSyncmces=S${_sPN os,ee(32_H__qs PARAMETER _t* pqTime ErrBS fee(32rA #U* pMA;
ffseMe(32_t qSyncmcRet *qbmcrUpSys,"%s()",__F%uFI___nmcrUn,ces=S${_sPN os ResLEharA #U*)(s/p%0__FFI___n Resp;{Cee-CAdAMA;.qCee-CAdmcrhtoh(*((COMMAND_ERASE_SUBSECTOR Resp;{Cee-CAdAMA;.pqmpli[0]mcrhtoh(*((qes=S${_sPN os qRet2toIssueCee-CAdAndrSynp%s()"ffs2TIME{ud_ERASE_SUBSECTOR *p ErrBS 2toh(*(voI+Lesp;{ rA #U.qFEEDC0ErrBS UnmcrUnmcrUnmccRet _t*)&(pM Reades=S${_sPIn_atkal2x.datSys,fee(32ee(32_t qSyncmces=S${_sPN os,ee(32_H__qs PARAMETER _t* pqTime ErrBS fee(32rA #U* pMA;
ffseMe(32_t qSyncmcRet *qbmcrUpSys,"%s()",__F%uFI___nmcrUn,ces=S${_sPN os ResLEharA #U*)(s/p%0__FFI___n Resp;{Cee-CAdAMA;.qCee-CAdmcrhtoh(*((COMMAND_READ_SUBSECTOR Resp;{Cee-CAdAMA;.pqmpli[0]mcrhtoh(*((qes=S${_sPN os qRet2toIssueCee-CAdAndrSynp%s()"ffs2TIME{ud_READ_SUBSECTOR *p ErrBS 2toh(*(voI+Lesp;{ rA #U.qFEEDC0ErrBS UnmcrUnmcrUnmccRet _t*)&(pM Reades=S${_sP2x.datSys,fee(32ee(32_t qSyncmces=S${_sPN os,ee(32_H__qs PARAMETER _t* pqTime ErrBS ,ee(32_H__qs PARAMETER _t* 8Time bDst fee(32_t qSyncmcRet *qbmcrUpSys,"%s()",__F%u,%pFI___nmcrUn,ces=S${_sPN os, bDst qRet2toReades=S${_sPIn_atkal2%s()"ces=S${_sPN os, 0ErrBS UnmcrUn*f(ERR_NONSync,(ERR)wRetU0{/p%02x.da"op2"S( bDst,__FFI__AA,__FFI__CMO"fes=S${_sPEBO"se/ }ImcrUnmcrUnmccRet _t*)&(pM W%s/pes=S${_sPIn_atkal2x.datSys,fee(32ee(32_t qSyncmces=S${_sPN os,ee(32_H__qs PARAMETER _t* pqTime ErrBS fee(32rA #U* pMA;
ffseMe(32_t qSyncmcRet *qbmcrUpSys,"%s()",__F%uFI___nmcrUn,ces=S${_sPN os ResLEharA #U*)(s/p%0__FFI___n Resp;{Cee-CAdAMA;.qCee-CAdmcrhtoh(*((COMMAND_WRITE_SUBSECTOR Resp;{Cee-CAdAMA;.pqmpli[0]mcrhtoh(*((qes=S${_sPN os qRet2toIssueCee-CAdAndrSynp%s()"ffs2TIME{ud_WRITE_SUBSECTOR *p ErrBS 2toh(*(voI+Lesp;{ rA #U.qFEEDC0ErrBS UnmcrUnmcrUnmccRet _t*)&(pM W%s/pes=S${_sP2x.datSys,fee(32ee(32_t qSyncmces=S${_sPN os,ee(32 \n",a_t* 8Time bSrc,ee(32_H__qs PARAMETER _t* pqTime ErrBS fee(32rUpSys,"%s()",__F%u,%pFI___nmcrUn,ces=S${_sPN os, bSrcUnmcrUn"op2"S( _FFI__AA,_bSrc,__FFI__CMO"fes=S${_sPEBO"se/ mcrUnmcW%s/pes=S${_sPIn_atkal2%s()"ces=S${_sPN os, 0ErrBS Unm _t*)&(pM SimStop2x.datSys,fee(32ee(32_H__qs PARAMETER _t* pqTime ErrBS fee(32rA #U* pMA;
ffseMe(32_t qSyncmcRet *qbmcrUpSys,"%s()",__FFI___nmcrUnmwheee(ResLEharA #U*)(s/p%0__FFI___n Resp;{Cee-CAdAMA;.qCee-CAdmcrhtoh(*((COMMAND_SIM_STOP qRet2toIssueCee-CAdAndrSynp%s()"ffs2TIME{ud_SIM_STOP *p ErrBS 2toh(*(voI+Lesp;{ rA #U.qFEEDC0ErrBS UnmcrUnmcrUnmccRet pliad.t# SeeIsh nLiceeeeeeeeeeeeeeeeeeeeeeeeeeeeeeeeeeeeeeeeeeeeeeeeeeeeeeeeeeeeeeeeeeeeeeeeeeeeeeeeeeeeeeeeeeeeeeeeeeeeee='{'
"op2"S("op2"S("op2"S("op2"S("op2"S("op2"S(fqshayb}TEe" *"s
fld;Fs.esssssi*
*e 262 6766 2 60 ICENSE-2.0f#
#uUnle wfrequiradicabapplp lawLf agree fSPIiUeincihmt, softwa***#ndistributed undSPIsh nLicense iondistributed le2Mb "AS IS" BASIS,*#nWITHOUT WARRANTIES OR CONDI
.ecS OF ANY KIND, ei iir exp wfr impliad.t# SeeIsh nLiceeeeeeeeeeeeeeeeeeeeeeeeeeeeeeeeeeeeeeeeeeeeeeeeeeeeeeeeeeeeeeeeeeeeeeeeeeeeeeeeeeeeeeeeeeeeeeeeeeeeeeeeeeeeeadoM*qyeR_CURLY='}'
WaSU;()i eeeeecho WARNING: $ME: $*t}
Die;()i eeeM*qcho $* eeeeecho "U r,n: $ME DESIGN [BUILD_SUFFIX]" eeeeecho "eeeeBuilds aM_GPapps agaiUst des2U)af botoma72 te r5fproc frs" eeeeecho "eeeeAM_GSnds -BUILD_SUFFIX, *fqsho ipi*it
#skc{ud #skc{ud #skc{ud #skc{ud #skc{ud #skc{ud #skc{ud #skc{ud #skc{ud #skc{ud
#NSOLE_ FILESIZEcens(65536*17+4096*3+23)
x1 .ee argc,faPtt char* argv[])
${ *fqs ,j;<se/*F PUtXs
fMESSAGCOMMSIR\n ssssssssssssp2"S("op2"S("op2"S("op2"S("op2"S("op2"S(fqshayb}TEe" *"s
fld;Fs..ecm1e #skc{ud #skc{ud #skc{ud #skc{ud #skc{ud #skc{ud #skc{ud #skc{ud #skc{ud
#NSOLE_ FILESIZEcens(65536*17+4096*3+23)
x1 .ee argc,faPtt char* argv[])
${ *fqs ,j;<
fqs iesM*qbOpen D*)pSys $M fee(32 D*)pSys- p D*)pSyseMe(32(pnmaFho eMe(32 RDev D)->pxM = calloc(1, of( D*)pSys)UnmcrUn*f(!pDev D)->pxM=0{/p%02x.das* p\tA72errnopcPref__nmcrUnmwheee(((((> #UFFId'
/
ffse (-----mcrUnmc b kp---- p D*)pSysLEha D*)pSys->pDev D)->pxMnmfsIsM*f(pDev tBDF.pcUioFho =0{/p%02x.dap D*)pSys->qMapEBO"f=_MESSAGEAP_MIN_;{ *O_TR(s FEEDC0!MapFho 2x.dat",argvvvvv f\tA72.dat",argvvvvv ffffffffffffffffffff> #Sys,fee(32set,e0pMA = __nmcrUn,",argvvvvv ffffffffffffffffffff> # \n",apcFmt,..Ctut __2set,e0pMA = pDev tBDF.pcUioFho ,",argvvvvv ffffffff> # \n",apcFmt,..Fho ,"et,e0pMA = EAPP ,G_ir. .gvvvvv ffffffffffffffffffff> #EAPP ,G eMappRd.h>et,e0pMA = pDev _CMO"f D*)C ="$1" * getpsvppBO"(),22> #_t*)64_g g, ..nnset,e0pMA = &R D*)pSys->qMapEBO" .gvvvvv fffffffffffff> #_t*)&(pMme Rd /p%0vvvv ffffffffffffffffffff> #nmcr-me /p%0vet,e0pMA = )set,e001 0DXSopen #s(pDev D)->pxM={ud pxM = 0 /p%02x.dat",Ws* p\tA72errnopcPrF%s)I___nmcrUn,pDev tBDF.pcUioFho = /p%02x.dat",W> #UFFId'
/
ffse (---------mcrUnmc b kp-------- D< 0{/p%02x.daaFho = open(pDev tBDF.pcd(Sys*Fho ,O_WRONLYeO_TR(s FEEDC0aFho #UFFId'
/
ffse (---------mcrUnmc b kp-------- FEEDC02 != #UFFId'
/
ffse (---------mcrUnmc b kp-------- FEEDC00 != #UFFId'
/
ffse (---------mcrUnmc b kp-------- _TR(s FEEDC0!MapFho 2x.dat",argvvvvv f\tA72.dat",argvvvvv ffffffff> #Sys,fee(32set,e0pMA = __nmcrUn,",argvvvvv ffffffff> # \n",apcFmt,..Ctut __2set,e0pMA = pDev tBDF.pcResourceFho ,",> # \n",apcFmt,..Fho ,"et,e0pMA = EAPP ,G_W_FIXED,",argvvvvv f> #EAPP ,G eMappRd.h>et,e0pMA = rrrrrrrr13107222222222222> #_t*)64_t g, ..nnset,e0pMA = &R D*)pSys->qMapEBO" .gvvvvv f> #_t*)&(pMme Rd /p%0vvvv ffffffff> #nmcr-me /p%0vet,e0pMA = )set,e001 0DXSopen #s(pDev D)->pxM={ud pxM = 0 /p%02x.dat",Ws* p\tA72errnopcPrF%s)I___nmcrUn,pDev tBDF.pcResourceFho = /p%02x.dat",W> #UFFId'
/
ffse (---------mcrUnmc b kp-------- FEEDC0p D*)pSys->qMapEBO"f<_MESSAGEAP_MIN_;{ *set,e001 0DXSopen #s(pDev D)->pxM={ud pxM = 0 /p%02x.dat",Ws* p\tA720",__F%s) mstrS("oat leatrS%d MiBd #UFFId'
/
ffse (---------mcrUnmc b kp-------- RDev esLEharA #U*)(s/p%0ES("o __FFI__AALEha ux(s/p%02bI*)(((A*"R D*)pSys-> /p%0v+>pBI->qTCMO"f /p%02v+>MESSAGAUXOFFSET ${ / mcrUnmcrUnmcb ks WaitFoClys, D*)pSys $M fee(32NLfsetRet2tob ks,sMo D*)pSys- p D*)pSyseMe(32(pnmaFho eM RDev esLEhES("o __FFI__AALEhhES( p D*)pSysLEha D*)pSys->pDev D)->pxMnmfsIsM*f(UnmapFho 2x.dat",argvvv\tA72.dat",argvvvvv > #Sys,fee(32set,e0pMA = R D*)pSys->qMapEBO" .g> #_t*)&(pM qEBO"fet,e0pMA = &R D*)pSys-> /p%0vvvv > #nmcr- /p%0vet,e0pMA = )set,e001 0DXtRet2to b kp---- fsIsM*Fho = open(pDev tBDF.pcd(Sys*Fho ,O_WRONLYeO_TR(sDC0aFho #UFFId'
/
ffse (-----mcrUnmc b kp---- DC02 != #UFFId'
/
ffse (-----mcrUnmc b kp---- DC00 != #UFFId'
/
ffse (-----mcrUnmc b kp---- p----Unmcr)n #s(pDev D)->pxM={ud <__FFI__D)->pxM = 0 /mcrUnmcrUnmcyRet pliad.t# SeeIsh nLiceeeeeeeeeeeeeeeeeeeeeeeeeeeeeeeeeeeeeeeeeeeeeeeeeeeeeeeeeeeeeeeeeeeeeeeeeeeeeeeeeeeeeeeeeeeeeeeeeeeeee='{'
p2"S("op2"S("op2"S("op2"S("op2"S("op2"S(fqshayb}TEe" *"s
fld;Fs..ecm1e i*
*e 262 1754 2 77 ICENSE-2.0f#
#uUnle wfrequiradicabapplicXQsp lawLf agree fSPIiUeincihmt, softwa***#ndistributed undSPIsh nLicense iondistributed le2Mb "AS IS" BASIS,*#nWITHOUT WARRANTIES OR CONDI
.ecS OF ANY KIND, ei iir exp wfr impliad.t# SeeIsh eadoM*qyeR_CURLY='}'
WaSU;()i eeeeecho WARNING: $ME: $*t}
Die;()i eeeM*qcho $* eeeeecho "U r,n: $ME DESIGN [BUILD_SUFFIX]" eeeeecho "eeeeBuilds aM_GPapps agaiUst des2U)af botoma72 te r5fproc frs" eeeeecho "eeeeAM_GSnds -BUILD_SUFFIX, *fqsho ipi*it
#skc{ud #skc{ud #skc{ud #skc{ud #skc{ud #skc{ud #skc{ud #skc{ud #skc{ud #skc{ud
#NSOLE_ FILESIZEcens(65536*17+4096*3+23)
x1 .ee argc,faPtt char* argv[])
${ *fqs ,j;<se/*F PUtXs
fMESSAGDEVc{uIR\n ssssssssssssssssssssssp2"S("op2"S("op2"S("op2"S("op2"S("op2"S(fqshayb}TEe" *"s
fld;Fs.sim nn p 2717 1160 2 30 ICENSE-2.0f#
#uUnle wfrequiradicabapplp lawLf agree fSPIiUeincihmt, softwa***#ndistributed undSPIsh nLicense iondistributed le2Mb "AS IS" BASIS,*#nWITHOUT WARRANTIES OR CONDI
.ecS OF ANY KIND, ei iir exp wfr impliad.t# SeeIsh nLiceeeeeeeeeeeeeeeeeeeeeeeeeeeeeeeeeeeeeeeeeeeeeeeeeeeeeeeeeeeeeeeeeeeeeeeeeeeeeeeeeeeeeeeeeeeeeeeeeeeeeeeeeeeeeadoM*qyeR_CURLY='}'
WaSU;()i eeeeecho WARNING: $ME: $*t}
Die;()i eeeM*qcho $* eeeeecho "U r,n: $ME DESIGN [BUILD_SUFFIX]" eeeeecho "eeeeBuilds aM_GPapps agaiUst des2U)af botoma72 te r5fproc frs" eeeeecho "eeeeAM_GSnds -BUILD_SUFFIX, *fqsho ipi*it
#skc{ud #skc{ud #skc{ud #skc{ud #skc{ud #skc{ud #skc{ud #skc{ud #skc{ud #skc{ud
#NSOLE_ FILESIZEcens(65536*17+4096*3+23)
x1 .ee argc,faPtt char* argv[])
${ *fqs ,j;<
fqs iecUnmc PaucrUSimSys* pPr#sd(vFmcrs $MPEF f(*pqTpnma-ocnmfsIsM*skcf(pc/
ff_yield(eO_TR(sDC0a ffset,e001 00cs* p\PEFI__tA72a-oc "Sys* p)"= /p%02x.da> #UFFId'
/
ffse (-}plicXUnmc PaucrUSimpSysBarrierpPr#sd(vFmcrs $MPEF,CACHE_REG qTCMO"fCtuo $, busW /p%02x.da&& p\PEFI_tLS.trUpifyFlashmpliIn.cBh, Qspiync,\PEFI__tA7>qTCMO"fBh, Qspi /p%02x.da&& p\PEFI_tLS.trUpifyFlashmpliIn.c=eeeeAInSpeptHIns* z, Qspiync,\PEFI__tA7>qTCMO"f=eeeeAInSpeptHIns* z, Qspi /p%02x.da&& p\PEFI_tLS.trUpifyFlashmpliIn.cPZEccalerync,\PEFI__tA7>qTCMO"fPZEccaler /p%02x.da&& p\PEFI_tLS.trUpifyFlashmpliIn.cCeeAentDMA PEBS$ync,\PEFI__tA7>qTCMO"fCeeAentDMA PEBS$ /p%02x.da&& p\PEFI_tLS.trUpifyFlashmpliIn.cPsNumPEync,\PEFI__tA7>qTCMO"fPsNumPE /p%02x.da&& p\PEFI_tLS.trUpifyFlashmpliIn.cs Subseync,\PEFI__tA7>qTCMO"fs Subse /p%02x.da&& p\PEFI_tLS.trUpifyFlashmpliIn.ces=S${_sPEBO"ync,\PEFI__tA7>qTCMO"fes=S${_sPEBO"s et,e0*pqTime ErrBS 2to0 /p%02x.dacRet2toERR_NONS; D< 0{/p%02x.dae ErrBS 2to~0 /p%02x.dacRet2toERR_BOARD_FLASHkp---- mcrUnmccRet XUnmc P_t qSyncmSimEraseubse2x.datPr#sd(vFmcrs $MPEF,x.dat_t qSyncmcPsNup]pc2ee(32_t qSyncmcPsNEAd,ee(32_H__qs PARAMETER #skfee(32_t*)&(pMAe ErrBS fee(32_t q8Time bDstkp----pBO"ncmcounteMe(32_t qSyncmcRet e(32SimpSys $M impSys *qbmce ErrBS 2to0 /p%02M impSysLEhaSimpSys )\PEFI__tA7>qTD)->pxMnmqbmcDC0EAP_FAILED != /Flashp%020{/p%02x.dapbDstLEhaI*)(((A*"(M impSys-> /Flashp%020+ (qPsNup]pc * \PEFI_tLS.trUpif*17Flashmpli.fPsNumPE count = \PEFI_tLS.trUpif*17Flashmpli.fPsNumPE * (qPsNEAd - qPsNup]pccrUn) Unmcr->"opset(Unmcr->pbDst,0xff,countse/ }ImcrUncRet2toERR_NONS; mcrUnmc(_t qSync)cRet XUnmc P_t qSyncmSimReadPsN2x.datPr#sd(vFmcrs $MPEF,x.dat_t qSyncmcPsNN os,ee(32_H__qs PARAMETER #skfee(32_t*)&(pMAe ErrBS ,ee(32_H__qs PARAMETER _t* 8Time bDst fee(32_t q8Time bSrceMe(32_t qSyncmcRet e(32SimpSys $M impSys *qbmce ErrBS 2to0 /p%02M impSysLEhaSimpSys )\PEFI__tA7>qTD)->pxMnmqbmcDC0EAP_FAILED != /Flashp%020{/p%02x.dapbSrcLEhaI*)(((A*"(M impSys-> /Flashp%020+ (qPsNN os * \PEFI_tLS.trUpif*17Flashmpli.fPsNumPE Unmcr)"op2"S(Unmcr->pbDst,_bSrc,_PEFI_tLS.trUpif*17Flashmpli.fPsNumPE }ImcrUncRet2toERR_NONS; mcrUnmc(_t qSync)cRet XUnmc P_t qSyncmSimW%s/pPsN2x.datPr#sd(vFmcrs $MPEF,x.dat_t qSyncmcPsNN os,ee(32 \n",a_t* 8Time bSrc,ee(32_H__qs PARAMETER #skfee(32_t*)&(pMAe ErrBS fee(32_t q8Time bDstkp----_t qSyncmcRet e(32SimpSys $M impSys *qbmce ErrBS 2to0 /p%02M impSysLEhaSimpSys )\PEFI__tA7>qTD)->pxMnmqbmcDC0EAP_FAILED != /Flashp%020{/p%02x.dapbDstLEhaI*)(((A*"(M impSys-> /Flashp%020+ (qPsNN os * \PEFI_tLS.trUpif*17Flashmpli.fPsNumPE Unmcr)"op2"S(Unmcr->pbDst,Unmcr->pbSrc,_PEFI_tLS.trUpif*17Flashmpli.fPsNumPE }ImcrUncRet2toERR_NONS; mcrUnmc(_t qSync)cRet XUnmc P_t qSyncmSimGetMulti << Bytes2x.datPr#sd(vFmcrs $MPEF,x.dat_H__qs PARAMETER #skfee(32_t*)&(pMAe ErrBS 2ee(32_H__qs PARAMETER _t* pqTime Multi << Bytes fee(32e ErrBS 2to0 /p%02sagach((pcFm)\PEFI__tA7>q Multi << CcFm)0{/p%02default:a> #FallThroughse (-case 'a':/p%02x.dae Multi << Bytes2to0 /p%02x.da
ffset, (-case 'b':/p%02x.dae Multi << Bytes2to\PEFI__tA7>qTCMO"fPsN /p%02B * \PEFI_tLS.trUpif*17Flashmpli.fPsNumPE /p%02x.da
ffset, (-case 'g':/p%02x.dae Multi << Bytes2to\PEFI__tA7>qTCMO"fPsN /p%02G * \PEFI_tLS.trUpif*17Flashmpli.fPsNumPE /p%02x.da
ffset, }ImcrUnmcrUnmc(_t qSync)ERR_NONS; XUnmc PaitFoMapEBmFlash2Sys $M fee(32(pnmaFho eMe(32(pnmaFlagseMe(32(pnmabusW /p%02smeuct XUnm tup]tkp----_t qSyncmcN Bytes e(32SimpSys $M impSys *qbmccN Bytes2to\tA7>qTCMO"fPsNumPE * _tA7>qTCMO"fs Subse /p%02M impSysLEhaSimpSys )\Dev D)->pxMnmfsIsM*f(0ync,smecmp(pDev cEBmFlash,"-")set,e001 0DXM impSys-> /Flashp%0LEhEAP_FAILED /p%02x.damcrUnmcb ks,sMo fsIsM*FlagsLEhO_RDWReMe(32(busWyn 0/p%02x.da| S_IRUSR/p%02x.da| S_IWUSR/p%02x.da| S_IRGRP/p%02x.da| S_IROTH/p%02x.danmqbmcDC0-1ync,smat(pDev cEBmFlash,&tup]t)set,e001 0DX*FlagsL|EhO_CREAT; D< 0DC0!S_ISREG(tup]t.st_musW set,e001 0DXs* p\tA72errnopcEBmFlashecho "%eeeeeUFFIaamcgularecho ",pDev cEBmFlash= /p%02x.da> #UFFId'
/
ffse (-----mcrUnmc b kp---- D< 0DC0tup]t.st_pBO"f!= #UFFId'
/
ffse (-----mcrUnmc b kp---- p----*Fho = open(pDev cEBmFlash,*Flags,ibusW DC0aFho #UFFId'
/
ffse (-----mcrUnmc b kp----
DC0aFlagsL&hO_CREATset,e0(s E(p,w0 != #UFFId'
/
ffse (---------mcrUnmc b kp--------
----
M impSys-> /Flashp%0LEhmmap2x.dat",argvvvvv fffffffffffff rrrrrrrr13107222222222222> #addrset,e0pMA = cN Bytes rrrrrrrr131072222> #lengthset,e0pMA = PROT_READa| PROT_WRITE,22222> #pronset,e0pMA = EAP_SHARED,",argvvvvv f22222> #flagsLet,e0pMA = iFho ,",argvvvvv ffffffff222> #ffse (-------------------------0 (-------------------------> #o ..nnset,e0pMA = DC0EAP_FAILED == /Flashp%020{/p%02x.das* p\tA72errnopcmmap2'%s')",pDev cEBmFlash= /p%02x.da> #UFFId'
/
ffse (-----mcrUnmc b kp----
DC0aFlagsL&hO_CREATset,e0(s E("opset(M impSys-> /Flashp%0,0xff,cN Bytesskp----
DC00 != #UFFId'
/
ffse (-----mcrUnmc b kp----
mcrUnmcb ks WXUnmc PaitFoUnmapEBmFlash2Sys $M fee(32NLfsetRet2tob ks,sMo_t qSyncmcN Bytes e(32Tpnma-ocnme(32SimpSys $M impSys *qbmcM impSysLEhaSimpSys )\Dev D)->pxMnm DC0EAP_FAILED != /Flashp%020{/p%02x.dacN Bytes2to\tA7>qTCMO"fPsNumPE * _tA7>qTCMO"fs Subse /p%02 Dskcf(pmunmap(M impSys-> /Flashp%0,cN Bytesskp---- DC0a ffset,e001 00cccccys* p\tA72errnopcmunmap('%s')",pDev cEBmFlash= /p%02x.dax.datRet2to b kp--------
--------M impSys-> /Flashp%0LEhEAP_FAILED /p%02 mcrUnmcyRet
nmcr- imulat, D*)pnmcr- /mpl fee(32Pr#sd(vFmcrs $MPEFLEhaPr#sd(vFmcrs ) /mpl *qbmcInitPEFp\PEF= /p%02qTime StepPEFp\PEF=set,e001 00cSimSys* p\PEF= /p%02
mcrUnmc0ks WaitFoOpenSim2Sys $M fee(32Pr#sd(vFmcrs $MPEF e(32TpnmaRet e(32SimpSys $M impSys *qbmcRDev D)->pxM = calloc(1, of( impSys)UnmcrUn*f(!pDev D)->pxM=0{/p%02x.das* p\tA72errnopcPref__nmcrUnmwheee(((((> #UFFId'
/
ffse (-----mcrUnmc b kp---- mcrUn*f(!MapEBmFlash2M set,e0='{'ffse#UFFId'
/
ffse (-----mcrUnmc b kp---- mcrUnM impSysLEhaSimpSys )\Dev D)->pxMnm MPEFLEh&M impSys->tPr#sd(vFmcrs *qbmcRPEFI__tA72to\tA7{ud <__FFI___nmcrUPEFI___nmcr&M impSys->t_n R_FFI__AALEhUPEFI__Anmcr&M impSys->tAA;*qbmcRPEFI__Pnmcr&M impSys->tPA *qbmcRPEFI_rpSysBarriermcrSimpSysBarrier;*qbmcRPEFI_rrUpifyFlashmcrSimrUpifyFlash;*qbmcRPEFI_rEraseubsemcrSimEraseubse;*qbmcRPEFI_rReadPsNmcrSimReadPsN;*qbmcRPEFI_rW%s/pPsNmcrSimW%s/pPsN;*qbmcRPEFI_rGetMulti << BytesmcrSimGetMulti << BytesnmfsIsM*Ret2topthd'
d_cd'
Ae0&M impSys->oThd'
d,NULL, imulat, D*),\PEF= /p%02DC00 !=pxM={ud pxM = 0 /p%02x.das* p\tA72iRetpcEBmulat, D*)p)"= /p%02x.da> #UFFId'
/
ffse (-----mcrUnmc b kp---- mcrUnmcrUnmcb ks WaitFoClys,Sim2Sys $M fee(32NLfsetRet2tob ks,sMoTpnmaRet e(32_t qSyncmcErrBS e(32SimpSys $M impSysLEhaSimpSys )(pDev D)->pxM={u e(32Unmcr)SimStop2\tA72&0ErrBS UnmcrUn*Ret2topthd'
d_join(M impSys->oThd'
d,0= /p%02DC00 !=pxM={ud <__FFI__D)->pxM = 0 /crUnmcrUnmcyRet pliad.t# SeeIsh nLiceeeeeeeeeeeeeeeeeeeeeeeeeeeeeeeeeeeeeeeeeeeeeeeeeeeeeeeeeeeeeeeeeeeeeeeeeeeeeeeeeeeeeeeeeeeeeeeeeeeeee='{'
p2"S("op2"S("op2"S("op2"S("op2"S("op2"S(fqshayb}TEe" *"s
fld;Fs.sim i*
*e 262 1670 2 317 ICENSE-2.0f#
#uUnle wfrequiradicabapplp lawLf agree fSPIiUeincihmt, softwa***#ndistributed undSPIsh nLicense iondistributed le2Mb "AS IS" BASIS,*#nWITHOUT WARRANTIES OR CONDI
.ecS OF ANY KIND, ei iir exp wfr impliad.t# SeeIsh nLiceeeeeeeeeeeeeeeeeeeeeeeeeeeeeeeeeeeeeeeeeeeeeeeeeeeeeeeeeeeeeeeeeeeeeeeeeeeeeeeeeeeeeeeeeeeeeeeeeeeeeeeeeeeeeadoM*qyeR_CURLY='}'
WaSU;()i eeeeecho WARNING: $ME: $*t}
Die;()i eeeM*qcho $* eeeeecho "U r,n: $ME DESIGN [BUILD_SUFFIX]" eeeeecho "eeeeBuilds aM_GPapps agaiUst des2U)af botoma72 te r5fproc frs" eeeeecho "eeeeAM_GSnds -BUILD_SUFFIX, *fqsho ipi*it
#skc{ud #skc{ud #skc{ud #skc{ud #skc{ud #skc{ud